ASIC Verification Engineer - New College Grad 2026

Nvidia

Quick summary

Work type
On-site
Location
Durham, NC · Madison, AL · Hillsboro, OR
Salary
$100,000–$166,750 / yr
Posted
52 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $188k
This role $133k
$85k most similar roles pay here $235k

This role pays less than 95% of similar roles. Most pay $158,962–$216,250 — the shaded band above. At the midpoint, this role pays about $133k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 985 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 971 roles with salary data.

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At a glance

TL;DR · ASIC Verification Engineer - New College Grad 2026

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Join NVIDIA’s Memory Management Unit Verification team as an ASIC Verification Engineer where you will collaborate with architects and designers to verify leading-edge GPUs. Your responsibilities include understanding complex designs, defining verification scope, developing testbenches, BFMs, checkers, and monitors, implementing comprehensive test plans, and ensuring coverage closure. You’ll work on strategic methodology planning for the testbench and leverage advanced verification techniques. Ideal candidates have a degree in Electrical Engineering, Computer Science, or related fields with expertise in SystemVerilog, C/C++, UVM, and assertion-based verification. Familiarity with simulation tools like VCS and debuggers such as Debussy is essential, along with strong problem-solving skills and knowledge of memory subsystems and cache policies. Experience with Perl or Python is a plus.

Skills

SystemVerilog C++ UVM Python Perl VCS IES Debussy GDB Object-Oriented Programming Constrained Random Testing Functional Coverage Assertion-Based Verification Semiformal Verification Memory Management Unit Cache Topologies Interconnects Arbiter Designs

What you'll do

  • Define verification scope for Memory Management Unit designs.
  • Develop verification infrastructure including testbenches, BFMs, checkers, and monitors.
  • Implement comprehensive test and coverage plans to ensure design correctness.
  • Collaborate with architects and designers across sites on verification goals.
  • Plan strategic direction of verification methodology and testbench development.

What we're looking for

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related field.
  • Experience with SystemVerilog, C/C++, test planning, coverage closure, and reusable verification components.
  • Knowledge of constrained random testing, functional coverage, and assertion-based verification.
  • Familiarity with simulation tools like VCS, IES, and debug tools such as Debussy, GDB.
  • Strong problem-solving skills and ability to collaborate across teams.
  • Understanding of memory subsystem micro-architecture, cache topologies, policies, interconnects, and arbiter designs.

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