ASIC Hardware Design Engineer - New College Grad 2026

Nvidia

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$116,000–$189,750 / yr
Posted
54 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $188k
This role $153k
$104k most similar roles pay here $232k

This role pays less than 78% of similar roles. Most pay $159,525–$216,250 — the shaded band above. At the midpoint, this role pays about $153k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · ASIC Hardware Design Engineer - New College Grad 2026

Join NVIDIA’s System-On-Chip (SOC) group as an ASIC Design Engineer and contribute to defining, developing, and delivering system-level methodologies and RTL for performance measurement on leading GPUs and SOCs. You will develop and automate flows, support projects with performance monitoring systems, and ensure design quality through rigorous checks under mentorship from senior engineers. Collaborate closely with architects, designers, and software engineers to implement microarchitecture and RTL features. Ideal candidates have a strong background in digital design and computer architecture, experience with Python or other scripting languages, knowledge of Verilog and SOC concepts, and excellent problem-solving skills. This role offers the opportunity to work on cutting-edge technology at scale within a supportive environment.

What you'll do

  • Define and develop system-level methodologies for performance measurement on GPUs and SOCs.
  • Contribute to the automation of flows and methodologies for efficient IP development.
  • Apply performance monitoring systems under senior engineer guidance for multiple projects.
  • Conduct RTL checks to ensure design quality across various domains and conditions.
  • Design and implement microarchitecture features with mentorship from experienced engineers.

What we're looking for

  • Bachelor’s or Master’s degree in Electrical or Computer Engineering required.
  • Strong background in digital design and computer architecture.
  • Experience with Python or other scripting languages.
  • Knowledge of RTL design (Verilog) and digital design concepts.
  • Understanding of SOC architecture concepts.
  • Excellent problem-solving and analytical skills.
  • Proven teamwork and communication across multiple teams.

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