IC Design Engineer

Broadcom

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Colorado Springs, COSan Jose, CA
Salary
$121,900–$195,000 / yr
Employment
Full-time
Posted
6 days ago
Freshness
Confirmed live today
Closes
Apr 18, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $196k
This role $158k
$109k $243k
below market most similar roles pay here above market

This role pays less than 79% of similar roles. Most pay $162,000–$229,650 — the blue band above. At the midpoint, this role pays about $158k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · IC Design Engineer

The IC Design Engineer joins the Data Center Solutions Group to support next generation AI/ML ecosystems through PCIe Switch Products and Enterprise Storage Products. This role involves high-level architecture specification analysis, micro-architecture development, and documentation. The engineer will perform high-performance Verilog/SystemVerilog RTL implementation, addressing asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations, pipelining, multi-threaded designs, and third-party IP integration. Key tasks include converging designs to timing closure via RTL optimization, debugging, and collaborating with Verification, Software, Emulation, and Validation Engineering teams. Candidates should possess knowledge of PCIe, CXL, AMBA protocols, RAID storage designs, and PCIe Switch designs. The position requires a Bachelor’s degree in a relevant engineering field and at least eight years of industry experience.

What you'll do

  • Analyze and author high-level architecture specifications.
  • Develop and document micro-architecture designs.
  • Implement high-performance Verilog/SystemVerilog RTL based on design specifications.
  • Manage asynchronous clock domain crossings, power domains, and low-power design.
  • Optimize RTL to achieve timing closure.
  • Debug RTL designs and provide robust technical solutions.
  • Support cross-functional engineering teams with RTL design issues.
  • Provide lab support for silicon during the validation process.

What we're looking for

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or an equivalent Engineering degree.
  • 8+ years of relevant industry experience.
  • In-depth knowledge of implementation and supporting RTL designs using Verilog/SystemVerilog.
  • Experience with asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations, and pipelining.
  • Ability to perform high-level architecture specification analysis, micro-architecture development, and RTL optimization for timing closure.
  • Superb RTL debugging skills and ability to work with cross-functional engineering teams.
  • Knowledge of PCIe, CXL, AMBA protocols, RAID storage designs, and PCIe switch designs (preferred).
  • Ability to work in person as no remote work is allowed.

More like this

Similar roles

IC Design Engineer

Broadcom

Colorado Springs, CO +1 6 days ago $121,900–$195,000
Verilog SystemVerilog RTL Design Micro-architecture PCIe CXL AMBA Low-power Design Timing Closure RTL Optimization Asynchronous Clock Domain Crossing Multi-threaded Design Storage Designs Emulation Validation
8+ yrs exp

IC Design Engineer

Broadcom

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Verilog SystemVerilog RTL Design Micro-architecture PCIe CXL AMBA Low-power Design Timing Closure RTL Optimization Asynchronous Clock Domain Crossing Multi-threaded Design Storage Designs Emulation Validation
10+ yrs exp

IC Design Engineer

Broadcom

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp

IC Design Engineer

Broadcom

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp

IC Design Engineer

Broadcom

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp

IC Design Engineer

Broadcom

Colorado Springs, CO +1 29 days ago $143,800–$230,000
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp