Hardware System Architecture Fellow, AI & Data Center Networking

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$284,800–$427,200 / yr
Posted
108 days ago
Freshness
Confirmed live yesterday
Closes
May 26, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k
This role $356k
$128k most similar roles pay here $459k

This role pays more than 98% of similar roles. Most pay $170,000–$239,175 — the shaded band above. At the midpoint, this role pays about $356k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Hardware System Architecture Fellow, AI & Data Center Networking

The Hardware System Architecture Fellow - AI & Data Center Networking serves as a high-impact individual contributor providing technical leadership for next-generation AI and data center networking platforms. This role involves defining end-to-end hardware system architecture, managing cross-domain trade-offs, and resolving complex challenges across AI-NICs, DPUs, switches, and rack-scale solutions. The Fellow will translate requirements into scalable hardware designs, oversee interconnect topology, power delivery, signal integrity, and board design while establishing engineering standards and review frameworks. Key responsibilities include leading feasibility analysis, mentoring engineers, and shaping multi-generation roadmaps for bandwidth scaling and optical adoption. The ideal candidate possesses deep expertise in system-level hardware architecture, high-speed bring-up, and advanced packaging technologies to solve critical problems within the AI scale-out and scale-up networking space, ensuring architectural intent is maintained through production.

What you'll do

  • Define system-level architecture for AI scale-out and scale-up networking platforms based on product requirements.
  • Drive architectural decisions across chip-to-system boundaries including interconnect topology, power delivery, and signal integrity.
  • Conduct early-phase system feasibility analyses to identify risks and technology inflection points.
  • Serve as the primary technical authority for challenges involving ASIC, packaging, board design, optics, and thermal integration.
  • Resolve complex bring-up, validation, and field issues by synthesizing cross-domain data for root-cause closure.
  • Establish and evolve system architecture best practices and review frameworks across the organization.
  • Mentor senior engineers on system architecture, trade-off analysis, and technical growth.
  • Shape multi-generation platform roadmaps to align with corporate AI networking strategies.

What we're looking for

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Deep expertise in system-level hardware architecture for networking, AI infrastructure, or data center platforms.
  • Proven track record of architecting and delivering complex hardware systems across multiple product generations.
  • Broad understanding of board design, power delivery, signal integrity, system validation, and high-speed bring-up.
  • Demonstrated ability to solve ambiguous, cross-domain problems with significant technical and business impact.
  • Experience with AI scale-out networking systems including AI-NICs, DPUs, or high-bandwidth switching platforms.
  • Familiarity with advanced interconnect and packaging technologies and their system-level implications.

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