Hardware System Architecture Fellow, AI & Data Center Networking

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$284,800–$427,200 / yr
Posted
153 days ago
Freshness
Confirmed live today
Closes
May 26, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $202k
This role $356k
$127k $459k
below market most similar roles pay here above market

This role pays more than 99% of similar roles. Most pay $167,300–$236,850 — the blue band above. At the midpoint, this role pays about $356k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · Hardware System Architecture Fellow, AI & Data Center Networking

The Hardware System Architecture Fellow - AI & Data Center Networking serves as a high-impact individual contributor providing system-level technical leadership for next-generation AI and data center networking platforms. This role involves defining end-to-end hardware system architecture, translating product requirements into scalable hardware solutions, and driving architectural decisions across chip-to-system boundaries. Key responsibilities include leading feasibility analyses, resolving complex cross-domain challenges in ASIC, packaging, board design, optics, power, thermal, and mechanical integration, and establishing system architecture best practices. The candidate must possess deep expertise in system-level hardware architecture for networking, AI infrastructure, or data center platforms, with specific experience in AI-NICs, DPUs, or high-bandwidth switching platforms. The role addresses technical problems regarding interconnect topology, signal integrity, power delivery strategy, and rack-scale networking solutions.

What you'll do

  • Define system-level architecture for AI scale-out and scale-up networking platforms based on product requirements.
  • Drive architectural decisions for interconnect topology, board partitioning, power delivery, and signal integrity.
  • Lead early-phase feasibility analyses to identify technical risks and trade-offs.
  • Serve as the primary technical authority for challenges across ASIC, packaging, board design, optics, and thermal integration.
  • Resolve complex bring-up and field issues by synthesizing cross-domain data for root-cause closure.
  • Establish standardized architecture review frameworks and system validation flows to improve execution quality.
  • Mentor senior engineers on system architecture, trade-off analysis, and technical growth.
  • Shape multi-generation platform roadmaps aligned with the company's AI networking strategy.

What we're looking for

  • Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Deep expertise in system-level hardware architecture for networking, AI infrastructure, or data center platforms.
  • Proven track record of architecting and delivering complex hardware systems across multiple product generations.
  • Broad understanding of board design, power delivery, signal integrity, system validation, and high-speed bring-up.
  • Demonstrated ability to solve ambiguous, cross-domain problems with significant technical and business impact.
  • Experience with AI scale-out networking systems, including AI-NICs, DPUs, or high-bandwidth switching platforms (preferred).
  • Familiarity with advanced interconnect and packaging technologies and their system-level implications (preferred).

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