Hardware Engineer

Microsoft

Confirmed live yesterday Trusted
Hybrid

Quick summary

Work type
Hybrid
Location
—
Salary
$119,800–$234,700 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday
Closes
Apr 10, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $186k
This role $177k
$106k $248k
below market most similar roles pay here above market

This role pays less than 56% of similar roles. Most pay $158,825–$214,000 — the blue band above. At the midpoint, this role pays about $177k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Microsoft

Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing

Microsoft currently has 694 open roles on FindRole.

Listed pay typically runs $119,800–$234,700 across 651 roles with salary data.

Most-posted roles

View all roles at Microsoft

At a glance

TL;DR · Hardware Engineer

Hardware Engineer - CTJ - POLY joins the Silicon Cloud Hardware Infrastructure and Engineering team to support the deployment of high-volume cloud hardware infrastructure. The role involves executing system-level end-to-end debug solutions for large-scale datacenter systems and leading collaboration projects with hardware, firmware, and software teams to drive root cause analysis. Key responsibilities include developing debug methodologies, test strategies, and automation to improve debug efficiency for mission-critical services. Candidates must possess a degree in Electrical, Computer, or Mechanical Engineering and demonstrate expertise in modern computer architectures, including System on Chip features like reliability, accessibility, and serviceability, virtualization technologies, memory controllers, and networking solutions. The position requires an active U.S. Government Top Secret Clearance with SCI access based on an SSBI with Polygraph to support federal government agency customers.

What you'll do

  • Execute end-to-end system level debug solutions for large-scale datacenter systems.
  • Lead hardware, firmware, and software collaboration projects to perform root cause analysis.
  • Execute targeted system-level root cause analysis and defect reduction projects.
  • Provide technical recommendations on diagnostics and debug deployment technologies.
  • Develop debug methodologies, test strategies, and test routines for datacenter solutions.
  • Build automation to solve problems relating to mission-critical services and debug efficiency.
  • Communicate project planning and progress to partners and stakeholders using data.

What we're looking for

  • Master's Degree in Electrical, Computer, or Mechanical Engineering and 3+ years of technical engineering experience.
  • Bachelor's Degree in Electrical, Computer, or Mechanical Engineering and 5+ years of technical engineering experience.
  • Equivalent technical engineering experience to the degrees and years listed above.
  • Active U.S. Government Top Secret Clearance with SCI access based on an SSBI with Polygraph.
  • U.S. citizenship is required due to legal restrictions supporting government agency customers.
  • Doctorate in Electrical, Computer, or Mechanical Engineering and 3+ years of technical engineering experience (preferred).
  • Master's Degree in Electrical, Computer, or Mechanical Engineering and 6+ years of technical engineering experience (preferred).
  • Bachelor's Degree in Electrical, Computer, or Mechanical Engineering and 8+ years of technical engineering experience (preferred).

More like this

Similar roles

Software Engineer II

Microsoft

46 days ago $102,100–$202,200
Python C# Java C++ JavaScript C GenAI Distributed Systems Infrastructure Orchestration SLA Observability Security Scalability
2+ yrs exp

Software Engineer

Microsoft

21 days ago $85,400–$168,100
C C++ C# Java JavaScript Python Rust Azure Azure DevOps Bicep Terraform ARM CI/CD Infrastructure as Code Distributed Systems Telemetry Observability Threat Modeling secure‑by‑design
1+ yrs exp Hybrid

Hardware Engineer

Cisco

San Jose, CA 35 days ago $154,900–$225,300
FPGA SoC Verilog System-Verilog PCIe Gen 4/5 DDR5 PAM4 Cadence Allegro Mentor Graphics Xpedition RTL Design Signal Integrity Power Delivery Networks DC-DC Converters LDOs x86 ARM BIOS PCB Layout
7+ yrs exp

Hardware Engineer

Cisco

San Jose, CA +1 52 days ago
SI PI HFSS Maxwell Cadence Concept Allegro Oscilloscopes Logic Analyzers Spectrum Analyzers PDN Analysis Hardware Validation StackUp Board File Analysis
5+ yrs exp Hybrid

Hardware Engineer

Broadcom

San Jose, CA 43 days ago
Co-Packaged Optics (CPO) Integrated Photonics IC Design Schematic Capture Circuit Simulation SI/PI Analysis Firmware Optical Engine Packaging ATE Software System-level Troubleshooting Validation Testing Hardware Design Fiber Alignment
10+ yrs exp

Hardware Engineer

Qualcomm

San Diego, CA 41 days ago $113,947–$141,200
Electronic Systems Integrated Circuitry DSP Simulation Emulation Hardware Engineering Electrical Engineering Computer Engineering Computer Science