Quick summary
- Work type
- On-site
- Location
- Austin, TX
- Posted
- 15 days ago
- Freshness
- Confirmed live yesterday
- Nearby
- 99+ roles within 25 mi
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Salary context
How this pay compares to similar roles
Similar $211k
$138k
most similar roles pay here
$278k
This listing doesn't post a salary. Most similar roles pay $180,325–$241,750.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has 2925 open roles on FindRole.
Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.
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At a glance
TL;DR · Graphics Power Analysis & Optimization Engineer
As a Graphics Power Analysis & Optimization Engineer within the Silicon Technologies group, you will support power activity for high-performance GPU development. You will be responsible for creating early power estimations and targets during architectural evaluation stages while performing what-if analyses. Your daily work involves supporting RTL and gate-level power rollup, identifying reduction opportunities across various GPU workloads, and implementing optimizations in both RTL and gates. Additionally, you will identify sign-off tests to improve coverage and develop flows or heuristics to accelerate triage on large datasets. To succeed in this role, you must possess skills in Verilog, SystemVerilog, and Python scripting. You should also have a background in micro-architecture, digital logic design principles including power and timing implications, and VLSI power fundamentals such as dynamic and leakage components like clock gating and data-gating.
Skills
What you'll do
- Create early power estimations and perform what-if analyses during the architectural evaluation stage.
- Perform RTL and gate-level power rollups and analysis for GPU designs.
- Analyze various GPU workloads to identify specific opportunities for power reduction.
- Evaluate and implement power optimizations at both the RTL and gate levels.
- Identify optimal power sign-off tests to improve overall power analysis coverage.
- Develop flows and heuristics to accelerate power triage on large datasets.
What we're looking for
- Bachelor of Science degree or higher.
- Experience with Verilog and SystemVerilog.
- Experience with scripting in Python.
- Knowledge of digital logic design principles including power and timing implications (preferred).
- Experience with VLSI power fundamentals, such as dynamic and leakage (preferred).
- Experience with low power design techniques like clock gating and data-gating (preferred).
- Excellent communication skills, self-motivated, and organized (preferred).
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