Graphics Design Verification Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
15 days ago
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Confirmed live today
Nearby
99+ roles within 25 mi

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Similar $203k
$139k most similar roles pay here $259k

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Graphics Design Verification Engineer

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As a Graphics Design Verification Engineer within the Silicon Technologies group, you will perform pre-silicon RTL verification of blocks in low power embedded graphics cores. You will be responsible for ensuring high confidence in testing coverage by developing test bench components, writing and executing test plans, and managing regressions to validate chip level features. Your daily work involves creating checkers, monitors, and BFMs while debugging simulation and silicon GPU failures. The role requires a strong background in computer architecture, specifically regarding CPU or GPU designs. You will utilize System Verilog, UVM, OVM, and HDLs like Verilog, alongside tools such as IES, VCS, DVE, and Verdi. Additionally, you will use Perl, Shell scripting, Makefiles, and TCL to develop software engineering flows while collaborating with multi-functional teams to meet functional goals for high-performance, power-efficient system-on-chip designs.

Skills

System Verilog UVM OVM Verilog HDL GPU Architecture RTL Verification Assertion Methodology Constrained Random Verification Code Coverage IES VCS DVE Verdi Perl Shell Scripting Makefiles TCL Perforce

What you'll do

  • Perform top-level verification for logic blocks in graphics processing unit (GPU) designs.
  • Write, execute, and track test plans to ensure full coverage of design features.
  • Develop test bench components using SystemVerilog and Universal Verification Methodology (UVM).
  • Generate stimulus and analyze functional and code coverage metrics.
  • Debug simulation and silicon failures within the GPU architecture.
  • Maintain regression suites and develop scripts for software engineering flows.
  • Create and maintain test benches and Bus Functional Models (BFMs).

What we're looking for

  • Bachelor of Science degree and 3 years of relevant experience.
  • Background in CPU or GPU architectures.
  • Experience working with Verilog or other HDLs.
  • Experience with verification languages such as SystemVerilog, UVM, or OVM.
  • Experience using HDL simulators and waveform viewers like IES, VCS, DVE, and Verdi.
  • Experience specifically with GPU architectures (preferred).
  • Understanding of constrained random verification, functional/code coverage, and assertion methodology (preferred).
  • Familiarity with Perl, Shell scripting, Makefiles, TCL, or Perforce (preferred).

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