Fellow Architect, Functional & Performance Verification

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$268,320–$402,480 / yr
Posted
39 days ago
Freshness
Confirmed live yesterday
Closes
Aug 3, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k
This role $335k
$120k most similar roles pay here $433k

This role pays more than 99% of similar roles. Most pay $177,250–$233,725 — the shaded band above. At the midpoint, this role pays about $335k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Fellow Architect, Functional & Performance Verification

Fellow Architect, Functional & Performance Verification will join the Adaptive and Embedded Computing Group to lead the evolution of pre-silicon verification and validation strategies. This role involves shaping next-generation architectures, methodologies, and technologies across IP, subsystem, and SoC development. The architect will drive improvements in verification quality, efficiency, and scalability by integrating advanced techniques, ML/AI innovations, and industry-standard protocols. Key responsibilities include developing testbench architectures, debug methodologies, and coverage closure while advancing simulation-based, formal, power, and performance verification strategies. The role also involves managing firmware-based validation on prototyping and emulation platforms. Candidates must be experts in C/C++, Python, Perl, Ruby, HDL/Verilog, and UVM-based methodologies. They will collaborate with EDA vendors like Synopsys, Cadence Design, and Siemens to address the challenges of increasingly complex semiconductor designs and ensure first-pass silicon success.

What you'll do

  • Define and execute functional and performance verification strategies across IP, subsystem, and SoC programs.
  • Advance simulation-based methodologies including constrained-random, directed, and coverage-driven techniques.
  • Enhance formal, power, performance, and implementation verification capabilities across the organization.
  • Develop firmware-based validation strategies for prototyping and emulation platforms to accelerate silicon readiness.
  • Influence architectural and design decisions by embedding "First-Time-Right" and Design-for-Verification principles into products.
  • Manage strategic engagements with EDA vendors to influence product roadmaps and develop next-generation tools.
  • Mentor verification engineers and provide technical leadership through coaching and knowledge sharing.
  • Represent AMD’s technical leadership through publications, papers, and presentations at industry conferences.

What we're looking for

  • Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • Expert proficiency in C/C++, Python, Perl, and Ruby programming and scripting languages.
  • Expertise in HDL/Verilog and UVM-based verification methodologies.
  • Deep experience architecting and deploying advanced functional verification and validation for complex semiconductor designs.
  • Advanced knowledge of functional and performance verification tools from leading EDA vendors like Synopsys, Cadence, or Siemens.
  • Hands-on experience with pre-silicon prototyping and emulation platforms for functional and performance verification.
  • Proven track record of technical thought leadership through publications, patents, and presentations at industry conferences.
  • Demonstrated ability to lead cross-functional teams and influence architectural and design decisions.

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