Fellow Architect, Functional & Performance Verification

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$268,320–$402,480 / yr
Posted
85 days ago
Freshness
Confirmed live today
Closes
Aug 3, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k
This role $335k
$120k $433k
below market most similar roles pay here above market

This role pays more than 99% of similar roles. Most pay $177,250–$241,750 — the blue band above. At the midpoint, this role pays about $335k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Fellow Architect, Functional & Performance Verification

Fellow Architect, Functional & Performance Verification The Fellow Architect, Functional & Performance Verification leads the evolution of pre-silicon verification and validation strategies within the Adaptive and Embedded Computing Group. This Fellow-level role involves shaping next-generation verification architectures, methodologies, and technologies for IP, subsystem, and SoC development. The architect will drive transformational improvements in verification quality, efficiency, and scalability by developing testbench architectures, debug methodologies, and coverage closure plans. Key responsibilities include leading simulation-based verification, including constrained-random and coverage-driven approaches, alongside formal, power, and performance verification. The role requires expertise in C/C++, Python, Perl, Ruby, HDL/Verilog, and UVM-based methodologies. The architect will utilize tools from Synopsys, Cadence Design, and Siemens to address the challenges of increasingly complex semiconductor designs and ensure first-pass silicon success.

What you'll do

  • Define and execute functional and performance verification strategies for IP, subsystem, and SoC programs.
  • Lead the evolution of simulation-based, formal, power, and performance verification methodologies.
  • Develop firmware-based validation strategies for prototyping and emulation platforms to accelerate silicon readiness.
  • Partner with architecture and RTL teams to embed Design-for-Verification principles into next-generation products.
  • Manage strategic engagements with EDA vendors to influence product roadmaps and develop new verification tools.
  • Mentor verification engineers and provide technical leadership through coaching and knowledge sharing.
  • Represent the company's technical leadership through publications and presentations at internal and external conferences.

What we're looking for

  • B.S., M.S., or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • Expert in programming and scripting languages such as C/C++, Python, Perl, and Ruby (preferred).
  • Strong proficiency in HDL/Verilog and UVM-based verification methodologies (preferred).
  • Expert understanding of functional and performance verification tools and solutions from leading EDA vendors (preferred).
  • Deep background in architecting and deploying advanced functional verification methodologies for complex semiconductor designs (preferred).
  • Hands-on experience with pre-silicon prototyping and emulation platforms (preferred).
  • Demonstrated ability to lead technical initiatives from concept through successful deployment (preferred).
  • Established record of technical thought leadership through publications, patents, and presentations (preferred).

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