Distinguished Engineer, Memory Architecture

What you'll do

• Define the long-term technical strategy for DRAM and memory architecture across multiple product lines.
• Develop multi-generation, cross-portfolio memory interface strategies including DRAM and SRAM requirements.
• Conduct performance-versus-power analyses to influence silicon trade-offs and product roadmap decisions.
• Lead the co-architecture of silicon with external vendors and intellectual property providers.
• Drive workload-aware modeling and post-silicon optimizations for machine learning applications.
• Mentor and develop the next generation of technical leaders within the organization.
• Generate sustained intellectual property and technical contributions in memory architecture.

What we're looking for

• MSEE, MSCE, PhD, or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 18+ years of relevant industry and/or academic experience.
• Proven expertise in crafting memory architecture for multiple successful silicon generations.
• Experience driving multi-generation, cross-portfolio memory interface strategy and performance-versus-power analysis.
• Ability to lead silicon and vendor/IP co-architecture.
• Deep roots in RTL, microarchitecture, or backend implementation (preferred).
• History of mentoring engineers into Principal and Distinguished-level roles (preferred).
• Experience building durable technical communities in memory architecture (preferred).