Digital/Mixed Signal Modeling/Verification Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
4 days ago
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Confirmed live today

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Similar $205k
$139k most similar roles pay here $253k

This listing doesn't post a salary. Most similar roles pay $168,500–$241,750.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3518 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2727 roles with salary data.

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TL;DR · Digital/Mixed Signal Modeling/Verification Engineer

As a Digital/Mixed Signal Modeling/Verification Engineer within the Hardware Technology organization, you will be responsible for verifying the functionality and performance of premier SOCs. You will own the modeling and verification of analog and RF blocks, such as regulators, bandgaps, data converters, LNAs, PAs, mixers, and PLLs. Your daily responsibilities include developing RNM models in SystemVerilog with self-checking techniques, creating assertions to ensure analog and digital specifications are met, and collaborating with analog designers to set up AMS simulation environments. You will also debug complex chip digital-on-top testbenches to identify root causes for failures. The role requires expertise in RNM coding, SystemVerilog, and Cadence mixed signal verification environments. You must possess strong fundamentals in analog/RF circuit theory while interpreting schematics to extract functionality for high-frequency components and biasing networks.

What you'll do

  • Develop RNM RF and analog models using SystemVerilog.
  • Create self-checking models for various analog and RF blocks.
  • Determine required model accuracy levels based on specific verification goals.
  • Develop assertions to ensure analog and digital specifications are met.
  • Collaborate with analog designers to set up AMS simulation environments.
  • Debug complex chip digital-on-top testbenches to identify root causes of failures.

What we're looking for

  • Bachelor of Science degree and at least 10 years of relevant industry experience.
  • Expert proficiency in RNM coding using SystemVerilog.
  • Strong fundamentals in analog/RF circuit theory and topologies.
  • Master of Science degree and 7 years of relevant industry experience (preferred).
  • Experience working with Cadence mixed signal verification environment (preferred).
  • Ability to read analog schematics and extract related main functionality (preferred).
  • Experience modeling mixed signal/RF blocks including biasing networks, regulators, data converters, and others (preferred).
  • Experience modeling high frequency PLLs (preferred).

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