DFT CAD Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
Austin, TX
Posted
87 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

How this pay compares to similar roles

Similar $210k
$137k $277k
below market most similar roles pay here above market

This listing doesn't post a salary. Most similar roles pay $177,250–$241,750.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3595 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2772 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · DFT CAD Engineer

JOB TITLE: DFT CAD Engineer As a member of the CAD and Methodology team within the Silicon Engineering Group, the DFT CAD Engineer works on breakthrough custom silicon and hardware technologies. This role involves developing and implementing DFT and ATPG flows, participating in DFT architecture development, and verifying implementations with the Synthesis CAD team. Key responsibilities include supporting infrastructure to generate structural test vectors, analyzing coverage, and addressing STA, physical, power, and logical issues. The position requires proficiency in Tcl, Perl, and Python scripting, along with experience using industry-standard DFT and logic synthesis tools. Candidates must understand scan architecture, scan compression, IEEE 1500 core wrapping, and scan stitching. The role focuses on solving complex hardware problems related to ATPG, JTAG, and MBIST for various chipsets across the product line.

What you'll do

  • Develop and implement DFT and ATPG flows for all design projects.
  • Participate in the development and implementation of DFT architecture with the design team.
  • Verify DFT implementations in coordination with the DFT and Synthesis CAD teams.
  • Support tools and infrastructure to generate structural test vectors and improve coverage.
  • Resolve STA, physical, power, and logical issues with DFT designers.
  • Drive engagements with DFT and ATPG vendors.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 10+ years of industry experience.
  • Proficiency in Tcl, Perl, and Python scripting.
  • Experience with industry-standard DFT and logic synthesis tools.
  • Familiarity with scan architecture, scan compression techniques, scan stitching, and scan reordering.
  • Familiarity with IEEE 1500 core wrapping.
  • Experience with DFT setup, rule checking (DRC), and debug.
  • Knowledge of ATPG, JTAG, MBIST, Verilog, VHDL, and synthesis tools (preferred).

More like this

Similar roles

DFT CAD Engineer

Apple Inc

Austin, TX 87 days ago
DFT ATPG Tcl Perl Python Verilog VHDL JTAG MBIST IEEE 1500 Scan Compression Logic Synthesis STA DRC Waveform Debugging Simulators
3+ yrs exp

DFT CAD Engineer

Apple Inc

Cupertino, CA 87 days ago $150,400–$277,600
DFT ATPG Tcl Python Perl Verilog VHDL JTAG MBIST IEEE 1500 Scan Compression Logic Synthesis STA DRC Waveform Debugging Simulators
3+ yrs exp

DFT CAD Engineer

Apple Inc

Cupertino, CA 87 days ago $184,700–$324,800
DFT ATPG Tcl Python Perl Verilog VHDL JTAG MBIST IEEE 1500 Scan Compression Logic Synthesis STA DRC Waveform Debugging Simulators
10+ yrs exp

DFT Lead Engineer

Broadcom

San Jose, CA 61 days ago $143,800–$230,000
DFT ATPG Scan Insertion MBIST TCL Python C++ Verilog Tessent SSN TetraMax Fastscan Mentor TestKompress IEEE1149.1 IEEE1149.6 IEE1687 IJTAG ICL PDL STA SerDes DDR PCIe ATE Ruby Perl
10+ yrs exp

Staff DFT Engineer

Arm Holdings

Austin, TX +1 48 days ago $198,100–$268,000
DFT Verilog TCL Perl ATPG Scan Compression Memory BIST JTAG IJTAG Logic BIST static-timing-analysis Cadence Synopsys Siemens DFT AMBA CoreSight RTL Gate Level Simulation Silicon Debug
10+ yrs exp Hybrid

CPU DFT Engineer

Qualcomm

Santa Clara, CA 24 days ago $147,900–$221,900
DFT ASIC Design Verilog VHDL Mentor Tessent TCL Python Perl Shell Scripting JTAG ATPG Scan Compression MBIST LBIST IEEE 1500
2+ yrs exp