Design Verification Engineer
Apple Inc
Quick summary
Market check
How this pay compares to similar roles
This role pays more than 50% of similar roles. Most pay $168,500–$229,100 — the shaded band above. At the midpoint, this role pays about $188k versus about $199k for comparable roles.
Based on 240 similar postings.
Employer
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has 3553 open roles on FindRole.
Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.
Most-posted roles
At a glance
As a Design Verification Engineer, you will join the hardware team to ensure the correctness of RTL designs by extracting attributes from design specifications and creating UVM based tests and sequences to stress the design. Your daily responsibilities include debugging root causes of failures using waveform analysis and log files, collaborating with design engineers on missing specifications or corner cases, and working with EDA vendors to utilize VIP tools in test benches. You will develop coverage points, write System Verilog Assertions, and define coverage models to measure verification quality. The role requires expertise in SystemVerilog, Verilog, C/C++, Perl, and Python. You must possess knowledge of UVM, OVM, VMM methodologies, digital logic design, chip architecture, and AMBA protocols to solve complex problems within the hardware verification domain.
What does a Design Verification Engineer earn?
Median $195800 from 78 postings across 10 companies.
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