Design Verification Engineer

As a Design Verification Engineer within the Hardware Technology team, you will be responsible for verifying the functionality and performance of premier SOCs. You will work at the heart of the chip design effort by collaborating with various subject areas to ensure the quality of specific IPs or subsystems. Your daily responsibilities include reviewing design and architecture specifications, developing test plans, creating coverage plans, and defining next-generation verification methodologies and testbenches. You will address complex technical challenges involving neural engine hardware, DRAM subsystems, memory controllers, encoding systems, security algorithms, and high-speed IO standards like PCI Express. To succeed, you must possess skills in SystemVerilog, digital simulation, UVM, and computer architecture. Proficiency in Python, Perl, C/C++, or assembly is also valued to help drive test cases and manage diverse hardware infrastructure requirements.