Design Verification Engineer

Apple Inc

Confirmed live today Low trust

Quick summary

Work type
On-site
Location
Beaverton, OR
Posted
40 days ago
Freshness
Confirmed live today

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Salary context

How this pay compares to similar roles

Similar $200k
$141k $242k
below market most similar roles pay here above market

This listing doesn't post a salary. Most similar roles pay $169,625–$230,087.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · Design Verification Engineer

As a Design Verification Engineer within the Hardware Technology team, you will ensure the functionality and performance of premier SOCs. You will own the quality of the SOC, IP, or subsystem by reviewing design and architecture specifications and collaborating closely with design and micro-architecture teams. Your daily responsibilities include developing test plans, tests, and coverage plans while defining next-generation verification methodologies and testbenches. You will communicate with software and architecture teams to understand use cases, drive test cases, run regressions, triage bugs, and analyze coverage. The role requires knowledge of computer architecture, digital design fundamentals, Verilog, SystemVerilog, digital simulation, and debug. You should also possess skills in Python, Perl, or similar scripting languages, with C/C++ and assembly experience being a plus for this chip design effort.

What does a Design Verification Engineer earn?

Median $189224 from 84 postings across 10 companies.

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What you'll do

  • Verify the functionality and performance of Apple’s premier SOCs, IPs, or subsystems.
  • Review design and architecture specifications to ensure quality and performance goals are met.
  • Develop comprehensive test plans, test cases, and coverage plans for hardware designs.
  • Define next-generation verification methodologies and build complex testbenches.
  • Communicate with design, architecture, and software teams to identify use cases and corner conditions.
  • Run and triage regressions while tracking bugs throughout the design cycle.
  • Analyze coverage metrics to ensure all design requirements are fully verified.

What we're looking for

  • Minimum of a Bachelor of Science degree.
  • Knowledge of computer architecture and digital design fundamentals (preferred).
  • Knowledge of Verilog or SystemVerilog, digital simulation, and debug (preferred).
  • Experience with Python, Perl, or similar scripting languages (preferred).
  • Ability to work independently to deliver project goals (preferred).
  • Experience with C/C++ or assembly (preferred).
  • Excellent interpersonal skills and the ability to take on diverse challenges (preferred).

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