DDRSS Validation Engineer

What you'll do

• Drive end-to-end validation of SoC subsystems including DDR, memory controllers, cache, and interconnects.
• Perform deep debug of functional issues in RTL simulations and testbenches.
• Analyze silicon failures related to timing, stability, and performance.
• Develop and maintain production-quality firmware in C for DDRSS IP sequences and power management.
• Execute firmware validation across RTL simulation, emulation systems, and physical silicon platforms.
• Conduct hands-on silicon bring-up and characterization of new hardware features.
• Create tools, debug infrastructure, and automation to improve validation efficiency and failure triage.

What we're looking for

• A Bachelor's degree in Science, Engineering, or a related field is required with 4+ years of experience.
• A Master's degree in Science, Engineering, or a related field is required with 3+ years of experience.
• A PhD in Science, Engineering, or a related field is required with 2+ years of experience.
• Candidates must have 6–9 years of experience in SoC validation, design verification, or post-silicon validation.
• Strong debug skills in Verilog and SystemVerilog simulation environments are required.
• Experience developing firmware in C for embedded systems is required.
• Hands-on experience with silicon bring-up, debug, and validation across simulation, emulation, and silicon platforms is required.
• A solid understanding of computer architecture and SoC subsystems including memory systems like DDR, cache, and interconnect is required.