Custom SOC IP Verification Engineer

What you'll do

• Verify fabric and interconnect IP blocks including DMA, routing, arbitration, ordering, flow control, and protocol compliance.
• Develop and implement UVM-based test plans for both IP-level and system-level SoC scenarios.
• Design and implement constrained-random and directed SystemVerilog testbenches for NoC topologies and multi-agent integrations.
• Drive the development of silicon and platform verification strategies for fabric and interconnect subsystems.
• Perform performance verification including bandwidth and latency analysis for interconnect fabrics.
• Execute assertion-based verification (SVA) to verify fabric and protocol properties.
• Ensure first-time right verification by coordinating with Architecture, Software, Design, Emulation, and Post-Silicon teams.

What we're looking for

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
• 8+ years of experience in ASIC verification with a focus on fabric, interconnect, or network-on-chip at IP and full chip levels.
• Strong knowledge of SystemVerilog and UVM methodology.
• Hands-on experience with industry-standard interconnect and bus protocols such as AMBA AXI or CHI.
• Proficiency in scripting languages including Python, Perl, or TCL.
• Knowledge of performance verification and bandwidth/latency analysis for interconnect fabrics (preferred).
• Exposure to verification IPs for bus protocols or emulation platforms like Palladium or Veloce (preferred).
• Experience in GPU or AI accelerator SoC interconnect verification (preferred).