below marketmost similar roles pay hereabove market
This role pays less than
88%
of similar roles. Most pay
$181,000–$254,750
— the blue band above.
At the midpoint, this role pays about
$162k
versus about
$218k
for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has
3497 open roles
on FindRole.
Listed pay typically runs
$174,149–$277,600
across 2702 roles with salary data.
CPU Microarchitect/RTL Engineer - Fetch, Out of Order will join the Silicon Engineering Group to drive architecture and RTL development for performant CPU cores. The role involves owning micro-architecture development from high-level exploration to detailed specification, as well as RTL ownership to meet power, performance, area, and timing goals. Key responsibilities include supporting verification through test bench development and formal methods, performing performance exploration, and collaborating on physical design delivery. Candidates should possess experience in microprocessor architecture, logic design principles, and Verilog or VHDL. Required skills include proficiency with simulators, waveform debugging, and programming in C, C++, Perl, or Python. The work focuses on out-of-order execution, instruction scheduling, load/store execution, and cache subsystems to solve high-performance and low-power microarchitecture challenges.
Develop and specify micro-architecture from high-level exploration to detailed specifications.
Develop, assess, and refine RTL designs to meet power, performance, area, and timing goals.
Support the verification team with test bench development, formal methods, and simulation.
Explore high-performance strategies and correlate RTL design against performance targets.
Implement and verify physical design aspects including timing, area, reliability, and testability.
Drive architecture and RTL development for CPU front-end and out-of-order subsystems.
What we're looking for
Minimum BS degree.
Experience with microprocessor architecture (preferred).
Experience with logic design principles with timing and power implications (preferred).
Experience in Verilog or VHDL (preferred).
Experience with simulators and waveform debugging process (preferred).
Expertise in out-of-order execution, instruction scheduling, integer/floating point execution, load/store execution, or cache and memory subsystems (preferred).
Understanding of low power microarchitecture techniques (preferred).
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture (preferred).