ASIC Power Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$122,700–$214,300 / yr
Posted
2 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $193k
This role $168k
$109k $253k
below market most similar roles pay here above market

This role pays less than 72% of similar roles. Most pay $166,500–$218,950 — the blue band above. At the midpoint, this role pays about $168k versus about $193k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3499 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2707 roles with salary data.

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At a glance

TL;DR · ASIC Power Engineer

The ASIC Power Engineer joins the wireless silicon development team to focus on low-power architecture, power modeling, and correlation efforts for wireless communication SoCs. The role involves defining power-efficient architecture schemes, writing power specifications, and estimating pre-silicon power. Key responsibilities include building high-accuracy wireless application and atomic power models, generating power vectors with Design and DV support, and collecting pre-silicon power data. The engineer must analyze and identify power reductions while supporting post-silicon power correlation. Required technical skills include ASIC power knowledge, experience with PTPX and Power Artist tools, and understanding of ASIC logic design and UPF. Candidates should also possess proficiency in scripting languages like Shell, Perl, or Python, along with knowledge of common SOC components such as CPU, fabric, peripherals, and PCIe.

What you'll do

  • Define power-efficient SoC architectures and write detailed power specifications.
  • Estimate pre-silicon power consumption for wireless communication SoCs.
  • Build high-accuracy power models for wireless applications and atomic components.
  • Define and generate power vectors with Design and DV support.
  • Collect pre-silicon power data using power flow tools.
  • Analyze data to identify and implement power reduction opportunities.
  • Support post-silicon power correlation tasks.

What we're looking for

  • Minimum requirement of a bachelor's degree.
  • ASIC power knowledge.
  • Experience with power tools such as PTPX and Power Artist.
  • Understanding of ASIC logic design.
  • Knowledge of low power design and UPF.
  • Proficiency in scripting languages such as Shell, Perl, or Python.
  • Basic knowledge of common SOC components including CPU, fabric, peripherals, and PCIe.
  • Strong problem solving and analytical skills.
  • Pre-silicon power estimation and modeling (preferred).
  • Wireless knowledge including WIFI, BT, and UWB (preferred).
  • System architecture experience (preferred).
  • Post-silicon power correlation experience (preferred).

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