ASIC Power Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$175,000–$308,500 / yr
Posted
2 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $242k
$131k $327k
below market most similar roles pay here above market

This role pays more than 86% of similar roles. Most pay $166,500–$217,525 — the blue band above. At the midpoint, this role pays about $242k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3499 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2707 roles with salary data.

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At a glance

TL;DR · ASIC Power Engineer

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The ASIC Power Engineer joins the wireless silicon development team to focus on low-power architecture, power modeling, and correlation efforts for wireless communication SoCs. The role involves defining power-efficient architectures and specifications, estimating pre-silicon power, and building high-accuracy wireless application and atomic power models. Key responsibilities include generating power vectors with Design and DV support, collecting pre-silicon data using power flow tools, identifying power reductions, and supporting post-silicon power correlation. Candidates must possess ASIC power knowledge, experience with PTPX and Power Artist tools, and an understanding of ASIC logic design and UPF. Proficiency in Shell, Perl, or Python scripting is required. The work addresses the technical challenge of creating highly energy-efficient wireless silicon for products involving WIFI, BT, and UWB technologies.

Skills

PTPX Power Artist UPF Python Perl Shell SoC Architecture Pre-silicon Power Estimation Post-silicon Power Correlation PCIe WiFi UWB Logic Design

What you'll do

  • Define power efficient SoC architectures and write power specifications.
  • Estimate pre-silicon power for wireless communication SoCs.
  • Build high-accuracy wireless application and atomic power models.
  • Define and generate power vectors with Design and DV support.
  • Collect pre-silicon power data using power flow and specialized tools.
  • Analyze data to identify and implement power reductions.
  • Support post-silicon power correlation tasks.

What we're looking for

  • BS degree and a minimum of 10 years of relevant industry experience.
  • ASIC power knowledge and understanding of ASIC logic design.
  • Experience with power tools such as PTPX and Power Artist.
  • Knowledge of low power design and UPF.
  • Proficiency in scripting languages including Shell, Perl, or Python.
  • Basic knowledge of common SOC components like CPU, fabric, peripherals, and PCIe.
  • Strong problem solving and analytical skills.
  • Experience with pre-silicon power estimation, modeling, wireless technologies, system architecture, and post-silicon power correlation (preferred).

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