ASIC & FPGA Design Engineer Senior

Lockheed Martin

Hybrid

Quick summary

Work type
Hybrid
Location
Liverpool, NY
Salary
$101,000–$178,135 / yr
Posted
3 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $186k
This role $140k
$87k most similar roles pay here $233k

This role pays less than 90% of similar roles. Most pay $160,000–$212,718 — the shaded band above. At the midpoint, this role pays about $140k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Lockheed Martin

Lockheed Martin is a global aerospace, defense, and security company that designs, develops, and manufactures advanced technology systems, products, and services for government and commercial customers worldwide.

Lockheed Martin currently has 611 open roles on FindRole.

Listed pay typically runs $101,000–$178,135 across 304 roles with salary data.

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View all roles at Lockheed Martin

At a glance

TL;DR · ASIC & FPGA Design Engineer Senior

Join Lockheed Martin’s Radar Missions Systems team in Syracuse, NY as a senior-level FPGA Engineer with 3 to 5+ years of professional experience. You will design complex digital signal processing and high-speed communication systems for radar technology, collaborating closely with program leadership and junior engineers. Key responsibilities include breaking down high DSP algorithms into manageable tasks and coaching less experienced team members while using tools like Xilinx Vivado and Intel Quartus. Ideal candidates possess strong VHDL programming skills, experience with Mentor Questa HDL simulator, and knowledge of digital signal processing specific to radar systems. This role demands expertise in FPGA architecture and design, as well as the ability to work on multiple projects simultaneously and guide their successful completion.

What you'll do

  • Design complex FPGA firmware architecture for radar systems.
  • Develop digital signal processing algorithms for high-speed communications.
  • Break down high-level DSP algorithms into manageable tasks for junior engineers.
  • Estimate and plan work for the firmware development team.
  • Implement FPGA designs using Xilinx Vivado or Intel Quartus platforms.

What we're looking for

  • Bachelor’s degree in Computer Science, Software Engineering, or Electrical and Computer Engineering with 7+ years of relevant work experience.
  • Prior technical leadership experience in FPGA architecture and design.
  • Strong working knowledge of digital signal processing functions, specifically for radar systems.
  • Extensive VHDL firmware programming capability on Xilinx, Intel, or Microsemi devices.
  • Experience using Mentor Questa HDL simulator and UVM verification techniques.
  • Ability to obtain and maintain a Secret security clearance, requiring U.S. citizenship.
  • Excellent oral, written, and presentation skills for guiding project completion.

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