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6 of up to 20 (filtered)

ASIC Design Verification Engineering Leader

Cisco

Remote (San Jose, CA) 62 days ago
Actively hiring Confirmed live yesterday High trust
SystemVerilog UVM Verilog Python Perl C C++ Linux ASIC Design Formal Verification Jasper Gold Veloce Palladium Zebu HAPS PCIe Ethernet RDMA TCP Fiber Channel P4
10+ yrs exp Remote

ASIC Digital Design Engineer Lead

Apple Inc

San Diego, CA 65 days ago $166,600–$296,000
Actively hiring Confirmed live yesterday Trusted Above market
Digital Design FPGA Silicon Bring-up Characterization Debug Mixed Signal Design MIPI HDMI TCON Micro-architecture Emulation Verification
10+ yrs exp

ASIC Digital Design Engineer Lead

Apple Inc

Cupertino, CA 65 days ago $175,500–$311,700
Actively hiring Confirmed live yesterday Trusted Above market
Digital Design FPGA Silicon Bring-up Characterization Debug Mixed Signal Design MIPI HDMI TCON Micro-architecture Emulation Verification
10+ yrs exp

ASIC Digital Design Engineer Lead

Apple Inc

Austin, TX 65 days ago
Actively hiring Confirmed live yesterday Trusted
Digital Design FPGA Silicon Bring-up Characterization Mixed Signal Design MIPI HDMI TCON Micro-architecture Emulation Verification Validation
10+ yrs exp

ASIC Design Engineer Technical Lead

Cisco

Remote (San Jose, CA) 69 days ago $186,900–$267,700
Actively hiring Confirmed live yesterday Low trust Above market
Verilog System Verilog ASIC Design RTL Python Perl TCL Micro-architecture Tape-out post silicon validation Simulation
8+ yrs exp Remote