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SoC Validation Post-Silicon Validation Python C/C++ Computer Architecture SerDes PCI CXL JTAG FPGA Emulation Analog Validation Power and Performance Hardware/Software Debug Schematics Firmware Oscilloscopes Protocol Analyzers Bit Error Rate Testers +14 more Show less

ASIC Design RTL-to-GDSII Floorplanning Clock Tree Synthesis Place-n-Route Static Timing Analysis DRC LVS TCL Python Perl Innovus ICC2 PrimeTime Calibre Pegasus ICV UPF CPF SDC FinFET EM/IR Analysis Virtuoso Formal Equivalence +19 more Show less

SoC Power & Performance Validation Python C/C++ Post-Silicon Validation DVFS FPGA Emulation Telemetry Profiling Bare Metal Firmware OS I/O Memory Interconnect Schematics +12 more Show less

SoC Architecture RTL Design ARM RISC-V X86 PCIe CXL USB UFS MIPI UCIe Chiplet Interconnect Protocol SMMU Memory Controller Firmware Machine Learning Data Science Functional Safety Performance Modeling +15 more Show less

SoC Validation Python C/C++ Post-Silicon Validation Computer Architecture JTAG FPGA Emulation PCIe Memory Controller Power Management Cache Coherency Firmware Logic Development Protocol Analyzers Oscilloscopes Logic Analyzers Bit Error Rate Testers Hardware/Software Debug +14 more Show less