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RTL Design Microarchitecture Verilog System Verilog C++ Python Perl Networking Silicon DPU Silicon Engineering Bus Protocols +6 more Show less

ASIC SoC Firmware Characterization Data Analysis Debug Tools Productization Methodology Bring-up +3 more Show less

Reliability Physics TDDB BTI HCI SM JEDEC AEC Failure Analysis JMP Memory Circuits Defect Screening +6 more Show less

Silicon Validation post silicon bringup ASIC GPU Logic Analyzers Oscilloscopes Hardware Software High Performance Computing Deep Learning Characterization ATE Micro-architecture Verification +9 more Show less