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Active Keyword: SoC Design Verification Engineer Remove filter Location: San Jose Remove filter Clear all

3 of up to 20 (filtered)

SoC Physical Design Verification Engineer

Apple Inc

San Jose, CA 67 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
LVS DRC ANT HVDRC Mentor Calibre Synopsys ICV Python Perl Tcl ASIC Layout Design Tapeout RDL Padring Bump Mixed Signal Physical Verification
10+ yrs exp
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SoC Design Verification Engineer

Amd

San Jose, CA 67 days ago $141,760–$212,640
Actively hiring Confirmed live today High trust Below market
System Verilog UVM Verilog C++ C Python Perl SOC Architecture Computer Architecture AXI AHB PCIe DDR Functional Verification Performance Verification Code Coverage Functional Coverage
Hybrid
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SoC Physical Design Verification Engineer

Apple Inc

San Jose, CA 108 days ago $129,300–$194,700
Actively hiring Confirmed live today High trust Below market
LVS DRC ANT Mentor Calibre Synopsys ICV RTL to GDS Layout Design Scripting Lithography Padring Bump RDL Physical Verification
Save