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Physical Design Floorplanning DRC LVS EMIR Python Tcl Perl EDA Tools Switch Fabric DDR SerDes HBM Chiplet Power Grid Design Multi-voltage Domain +11 more Show less

STA SDC Tcl Python Perl Shell ASIC MMMC Cadence Synopsys Signal Integrity IR-drop DFT PVT ATPG MBIST +11 more Show less

Physical Design Floorplanning DRC LVS EMIR Python Tcl Perl EDA Tools High Speed DDR SerDes HBM D2D I/O Chiplet Power Grid Design Multi-voltage Domain Bump Planning +12 more Show less

Physical Design STA Floorplanning Layout Clock Tree Synthesis EM/IR Analysis TCL Perl EDA Tools RTL Tape-out +6 more Show less