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Active Keyword: ASIC Design Verification Engineer Remove filter Location: San Jose Remove filter Clear all

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Staff Engineer, ASIC Design Verification

Samsung Semiconductor

San Jose, CA 2 days ago $163,000–$253,000
Actively hiring Posted this week Verified listing Above market
UVM C++ SystemVerilog ASIC verification UCIe HBM controller Memory DFT DDR Custom HBM CI/CD
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ASIC Design Verification Emulation Engineer

Cisco

San Jose, CA 2 days ago $165,000–$241,400
Actively hiring Posted this week Verified listing Competitive pay
SystemVerilog UVM Python Perl C++ ASIC Verification Emulation FormalVerification Docker CI/CD
Hybrid
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ASIC Design Verification Engineer

Cisco

Remote (San Jose, CA) 2 days ago $152,500–$219,200
Actively hiring Posted this week Verified listing Competitive pay
SystemVerilog UVM Perl Python Veloce Palladium Zebu HAPS IEV VC Formal PCIe CXL Ethernet RDMA DDR TCP
Remote
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ASIC Design Verification Engineer

Cisco

San Jose, CA 4 days ago $165,000–$241,400
Actively hiring Posted this week Verified listing Competitive pay
SystemVerilog UVM Python Perl C++ Data_center_technologies Hyperscalers AI_Networking Industry_standards Advanced_emulation Formal_verification_tools Silicon_debugging
Hybrid
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ASIC Design Verification Engineering Technical Leader

Cisco

Remote (San Jose, CA) 11 days ago $183,800–$263,600
Actively hiring Verified listing Above market
SystemVerilog UVM Linux C++ Python Perl Veloce Palladium Zebu HAPS CI/CD Networking Dashboard_management Emulation_platforms
Remote
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ASIC Design Verification Engineer

Cisco

Remote (San Jose, CA) 67 days ago $165,000–$241,400
Actively hiring Verified listing Competitive pay
SystemVerilog UVM ASIC Linux C C++ Python Perl Networking Formal verification
Remote
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