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Processor ASIC RTL Design Engineer

Qualcomm

San Diego, CA 31 days ago $127,200$190,800
Actively hiring Below market
SystemVerilog RTL Verilog Linting CDC LEC CLP Processor integration Bus interface Cache Digital design Logic design

ASIC Design Engineer (Hardware Security)

Qualcomm

San Diego, CA 33 days ago $140,000$229,800
Actively hiring Competitive pay
verilog system-verilog RTL DFT AHB AXI ASIC SoC Security Crypto Cryptography Encryption side-channel High-speed Low Area Low Power Root of Trust RNG symmetric crypto asymmetric crypto silicon test bus protocols clocks/resets debug concepts

Cellular ASIC Design Engineer

Apple Inc

San Diego, CA 41 days ago $201,300$367,400
Actively hiring Above market
Python Perl TCL Unix shell C C++ Hspice Finesim AFS Spectre Infinisim RedHawk SeaHawk Voltus ICC2 Fusion Innovus Aprisa PT PT-SI Tempus DC/DCT/DCG/Genus/Oasis Design Technology Co-optimization Power Optimization ML modeling EDA tools

ASIC Engineer, Project Leo

Amazon Inc

San Diego, California 46 days ago $122,600$170,000
Actively hiring Verified listing Below market
RTL System Verilog C/C++ ASIC design and verification tools Physical Design Power, Performance, Area (PPA) analysis RTL coding Debugging High Volume Manufacturing International Travel Customer Requirements Analysis Design Automation Mechanisms