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RF Analog Design Mixed-Signal Engineering Internship

Qualcomm

San Diego, CA +12 15 days ago
Actively hiring Confirmed live yesterday Trusted
RF Analog IC Design Mixed-Signal Design RFIC Cadence HFSS MATLAB Perl Python Verilog SystemVerilog Tcl Shell RTL DFT SerDes PCIe USB DDR HBM SIPI PDN

Senior Analog & RF IC Layout Engineer

Broadcom

Irvine, CA +1 94 days ago $109,700–$175,500
Actively hiring Confirmed live yesterday High trust Below market
RF Layout Cadence Virtuoso Mentor Calibre FinFET DRC LVS Floorplanning SerDes TX RX mixed signal Tape-out EDA Tools
8+ yrs exp