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Active Keyword: Design Verification Engineer Remove filter Location: Broomfield Remove filter Clear all

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Senior Digital / Mixed-Signal IC Design or Verification Engineer

Broadcom

Mendota Heights, MN +1 3 days ago $109,700–$175,500
Actively hiring Confirmed live yesterday Posted this week High trust Below market
UVM OVM SystemVerilog Assertions (SVA) Verilog VHDL Python TCL Perl Mixed-Signal Verification Logic Synthesis Static Timing Analysis Formal Verification Place and Route EDA Tools CMOS Bipolar Scripting
8+ yrs exp
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Design Verification Engineer

Broadcom

Broomfield, CO +4 38 days ago $143,800–$230,000
Actively hiring Confirmed live 2 days ago High trust Competitive pay
SystemVerilog UVM SVA RTL Gate-level Netlists Python Perl Tcl Git FPGA Emulation Synopsys Cadence Mentor Co-simulation iJTAG Tessent DesignSync
10+ yrs exp
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