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11 of up to 20 (filtered)

CAD Engineer, Custom EMIR Methodology

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
EM/IR Analysis Python Perl C/C++ Layout Design Simulation Extraction Physical Verification Circuit Verification Automation
10+ yrs exp

Physical Design Methodology CAD Engineer

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
Physical Design CAD Flow Tcl Python Perl PNR Static Timing Analysis STA RC Extraction EMIR ML GenAI Physical Verification SoC Design
10+ yrs exp

CAD Engineer, Custom EMIR Methodology

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
EM/IR Analysis Python Perl C/C++ Layout Design Simulation Extraction Physical Verification Circuit Verification Automation
3+ yrs exp

CAD Engineer, Custom EMIR Methodology

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
EM/IR Analysis Python Perl C/C++ Layout Design Simulation Extraction Physical Verification Circuit Verification Automation
3+ yrs exp

Virtuoso Custom CAD Engineer

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live yesterday Low trust
Cadence Virtuoso Python SKILL Tcl Perl Unix Linux DFII VXL PCELLs CDFs EDA Tools Revision Control Automation
10+ yrs exp

CAD Engineer, Circuit Simulation Methodology

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
Transistor Level Simulation EM/IR Analysis Python Perl C/C++ Layout Design Extraction Physical Verification Circuit Simulation Automation
3+ yrs exp

CAD Engineer, Custom EMIR Methodology

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
EM/IR Analysis Python Perl C/C++ Layout Design Simulation Extraction Physical Verification Circuit Verification Automation
10+ yrs exp

Virtuoso Custom CAD Engineer

Apple Inc

Beaverton, OR 41 days ago
Actively hiring Confirmed live today Low trust
Cadence Virtuoso Python SKILL Tcl Perl Unix Linux DFII VXL PCELLs CDFs EDA Tools Revision Control Automation
3+ yrs exp

FE RTL Infrastructure CAD Engineer

Apple Inc

Beaverton, OR 126 days ago
Actively hiring Confirmed live today Trusted
Python Perl Verilog SystemVerilog EDA Tools Perforce RTL Generative AI Configuration Management Lint Clock Domain Crossing Reset Domain Crossing

FE RTL Infrastructure CAD Engineer

Apple Inc

Beaverton, OR 126 days ago
Actively hiring Confirmed live today Trusted
Python Perl Verilog SystemVerilog EDA Tools Perforce RTL Build Configuration Management Generative AI Lint Clock Domain Crossing Reset Domain Crossing
3+ yrs exp

CAD Engineer, Design Verification Methodology

Apple Inc

Beaverton, OR 170 days ago
Actively hiring Confirmed live today High trust
Python TCL Perl Verilog SystemVerilog VHDL VCS Xcelium Modelsim Cadence Synopsys Verdi Indago C C++ Machine Learning RTL
10+ yrs exp