Senior Logic Design Engineer
Santa Clara, CA
22 days ago
$136,000–$218,500
Verilog
SystemVerilog
Vivado
Quartus
Diamond
Xilinx
Altera
Lattice
I2C
SPI
JTAG
PCIE
USB
Ethernet
Encryption
Python
Perl
FPGA
CPLD
ASIC
RTL
DFT
SI
Schematics
Layout
CI/CD