Wireless SOC Design Verification Engineer

Apple Inc

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $122,700–$214,300 / yr
Posted: 2 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $209k

This role $168k

$107k $265k

below market most similar roles pay here above market

This role pays less than 77% of similar roles. Most pay $177,200–$241,750 — the blue band above. At the midpoint, this role pays about $168k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3499 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2707 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Wireless SOC Design Verification Engineer

Role Posting Log in to save

JOB TITLE: Wireless SOC Design Verification Engineer As a Wireless SOC Design Verification Engineer, you will join the hardware team to own the end-to-end verification scope for the N1 wireless chip. You will work on a block or feature level, eventually expanding to subsystem and SOC integration. Your daily responsibilities include shaping verification plans before RTL lands, debugging corner-case failures, and verifying end-to-end WiFi and Bluetooth traffic flows. You will perform power intent verification using UPF and utilize AI-assisted tools for test generation and debug. The role requires proficiency in SystemVerilog, with preferred experience in UVM methodology, PCIe, bus fabric, and AXI-based architectures. You will solve complex problems involving low-power design, boot sequencing, and hardware-firmware interactions to ensure robust connectivity across the wireless SOC.

Skills

SystemVerilog UVM Formal Verification UPF PCIe AXI AHB Bus Fabric NOC WiFi Bluetooth RTL Post-Silicon Bring-up AI-assisted Verification SOC Integration

What you'll do

Shape the verification plan for specific blocks or features before RTL is finalized.
Debug corner-case failures and develop models to provide coverage or proof.
Verify low-power design intent using UPF within your assigned scope.
Perform formal verification on projects as required by the team.
Verify end-to-end WiFi and Bluetooth traffic flows from subsystem to SOC integration.
Apply AI-assisted tools for test generation, debugging, and verification closure.
Participate in post-silicon bring-up for projects reaching that stage.

What we're looking for

Minimum requirement of a bachelor's degree.
Strong academic record (GPA).
Proficiency in SystemVerilog.
Strong analytical thinking and problem-solving skills.
Familiarity with UVM methodology (preferred).
Exposure to PCIe, Bus Fabric, NOC, AHB, and AXI-based bus architectures in a UVM environment (preferred).
Experience verifying IP or top-level integration for a WiFi or Bluetooth SOC (preferred).
Experience with Formal Verification (preferred).
In-depth knowledge of low power design, UPF integration, boot-up, power-cycling, and HW/FW interaction verification (preferred).

Similar roles

Wireless SOC Design Verification Engineer

Apple Inc

Irvine, CA 2 days ago $122,700–$214,300

SystemVerilog UVM Formal Verification UPF PCIe AXI AHB WiFi Bluetooth SOC Integration RTL Post-Silicon Bring-up Bus Fabric NOC SPI UART

Save

Wireless SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $129,300–$225,300

SystemVerilog UVM Formal Verification UPF PCIe AXI AHB WiFi Bluetooth SOC Integration RTL Post-Silicon Bring-up Bus Fabric NOC Power Management Unit SPI UART

Save

Wireless SOC Design Verification Engineer

Apple Inc

San Diego, CA 2 days ago $175,000–$308,500

SystemVerilog UVM Formal Verification UPF ASIC PCIe AXI AHB NOC WiFi Bluetooth Post-Silicon Bring-up RTL SOC Integration SPI UART AI-assisted Verification

10+ yrs exp

Save

Wireless SOC Design Verification Engineer

Apple Inc

Irvine, CA 2 days ago $175,000–$308,500

SystemVerilog UVM Formal Verification UPF ASIC PCIe AXI AHB NOC WiFi Bluetooth RTL Post-Silicon Bring-up SOC Integration SPI UART

10+ yrs exp

Save

Wireless SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $184,700–$324,800

SystemVerilog UVM Formal Verification UPF ASIC PCIe AXI AHB NOC WiFi Bluetooth Post-Silicon Bring-up RTL SOC Integration SPI UART AI-assisted Verification

10+ yrs exp

Save

SOC Design Verification Engineer

Apple Inc

San Diego, CA 14 days ago $122,700–$214,300

SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold PCIe AXI AHB SVA RTL ASIC SOC WiFi Bluetooth Perl

Save