Video DV Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $129,500–$194,300 / yr
Posted: 13 days ago
Freshness: Confirmed live yesterday
Closes: Apr 12, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k

This role $162k

$118k $237k

below market most similar roles pay here above market

This role pays less than 67% of similar roles. Most pay $141,950–$224,137 — the blue band above. At the midpoint, this role pays about $162k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Video DV Engineer

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The Video DV Engineer joins the Video Systems Hardware Architecture team to verify multimedia designs, specifically focusing on Computer Vision hardware IP and subsystems. In this role, you will collaborate with architects, ASIC designers, and software engineers to plan and execute the verification and validation of multimedia subsystems for integration into mobile application SoCs. Your daily work involves developing block-level testbench environments and performing coverage-driven constrained random verification. You will utilize a technical stack including SystemVerilog, Verilog, C/C++, and scripting languages like Tcl, Perl, Python, and shell-scripting. Key methodologies include UVM, OVM, and Assertion Based Formal Verification. You will also apply knowledge of AMBA Bus protocols such as AXI, AHB, and APB to solve complex hardware integration problems.

Skills

SystemVerilog UVM OVM Verilog Python C/C++ Tcl Perl shell-scripting Formal Verification AMBA AXI AHB APB Constrained Random Verification OO Programming

What you'll do

Understand the expected functionality of Computer Vision hardware IP and multimedia subsystems.
Plan and execute verification and validation for multimedia subsystems for mobile SoC integration.
Develop block-level testbench environments using SystemVerilog.
Perform coverage-driven constrained random verification for multimedia hardware.
Utilize UVM or OVM methodologies to verify hardware designs.
Create scripts and automation tools using Python, Perl, or shell-scripting.
Perform debug and problem-solving for multimedia hardware issues.
Apply Assertion Based Formal Verification techniques to hardware designs.

What we're looking for

Bachelor's degree in Electrical Engineering, Computer Science, or a related field and 2+ years of relevant engineering experience.
Master's degree in a related field and 1+ year of relevant engineering experience.
PhD in Computer or Electrical Engineering, Computer Science, or a related field.
2+ years of experience with ASIC design and verification tools, techniques, and methodology.
Strong working knowledge of SystemVerilog, C/C++, and Tcl/Perl/Python/shell-scripting (preferred).
2+ years of experience developing block-level testbench environments using SystemVerilog (preferred).
2+ years of experience with UVM or OVM methodologies and exposure to Assertion Based Formal Verification (preferred).
2+ years of experience with scripting/automation skills using Perl or Python (preferred).

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