Verification Engineer Intern

Snap Inc.

Actively hiring Posted today Verified listing
CA · Eindhoven, Netherlands Posted today

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Salary context

How this pay compares to similar roles

Similar $155k
$107k most similar roles pay here $195k

This listing doesn't post a salary. Most similar roles pay $133,375–$177,250.

Based on 240 similar postings.

Employer

About Snap Inc.

Snap Inc. is a technology and camera company, best known for Snapchat, offering visual communication, augmented reality, and advertising products.

Snap Inc. currently has 55 open roles on FindRole.

Listed pay typically runs $209,000–$313,000 across 39 roles with salary data.

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At a glance

TL;DR

Join the Wearables Compute Group as a Computer/Electrical Engineering Intern for a 13-week program, focusing on verifying custom System on Chip (SoC) designs to ensure high-quality products. You will work on challenging technical projects, implement state-of-the-art verification practices like AI-driven tests and regression automation, and collaborate closely with international teams of engineers. Essential skills include strong computer science fundamentals in ASIC design/verification, problem-solving abilities, and the capacity to learn new verification engineering techniques. Preferred qualifications involve experience with UVM/SystemVerilog, scripting languages such as C and Python, familiarity with EDA tools like Synopsys or Cadence, and a passion for continuous learning and improvement.

Skills

SystemVerilog UVM Python C AI-assisted coding tools RTL code EDA vendor tools Synopsys Cadence Mentor

What you'll do

  • Verify custom-developed System on Chip (SoC) for product quality.
  • Implement state-of-the-art verification practices, including AI-driven tests and regression automation.
  • Research and apply new verification engineering skills throughout the internship.
  • Work on technical projects that align with business and product needs.
  • Collaborate closely with mentor and teammates to complete internship project.

What we're looking for

  • Strong background in computer science or electrical engineering fundamentals for ASIC design/verification.
  • Experience with verification methodologies and processes, such as UVM/SystemVerilog.
  • Proficiency in scripting languages like C, Python, and relevant SoC technologies.
  • Ability to read and understand RTL code (SystemVerilog, Verilog, VHDL).
  • Familiarity with AI-assisted coding tools and EDA vendor tools (Synopsys, Cadence, Mentor).

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