Verification Engineer Intern

What you'll do

• Verify custom-developed System on Chip (SoC) designs to ensure high product quality.
• Research and implement state-of-the-art verification practices such as AI-driven tests.
• Develop automated regression testing systems to improve verification workflows.
• Explore and analyze new industry trends in hardware verification.
• Execute technical projects aligned with specific business and product requirements.
• Analyze and interpret RTL code using SystemVerilog, Verilog, or VHDL.
• Utilize scripting languages like Python or C for SoC verification tasks.

What we're looking for

• Must be currently enrolled in a BS/MS program in a technical field like computer science or electrical engineering.
• Graduation date must be no earlier than December 2026.
• Must be available to start a 13-week internship in the office in Q2 of 2026.
• Strong fundamentals in computer science and electrical engineering tailored toward ASIC design and verification.
• Proficiency in verification methodologies and processes such as UVM or SystemVerilog.
• Experience with SoC and scripting languages including C and Python.
• Ability to read and understand RTL code in SystemVerilog, Verilog, or VHDL.
• Familiarity with EDA vendor tools from Synopsys, Cadence, or Mentor is preferred.