Verification Engineer Intern

Snap Inc.

Confirmed live 2 days ago High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Eindhoven, North Brabant, Netherlands
Employment
Intern
Posted
146 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

How this pay compares to similar roles

Similar $191k
$132k $235k
below market most similar roles pay here above market

This listing doesn't post a salary. Most similar roles pay $159,737–$222,125.

Based on 240 similar postings.

Employer

About Snap Inc.

Snap Inc. is a technology and camera company, best known for Snapchat, offering visual communication, augmented reality, and advertising products.

Snap Inc. currently has 103 open roles on FindRole.

Listed pay typically runs $209,000–$313,000 across 93 roles with salary data.

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At a glance

TL;DR · Verification Engineer Intern

The Verification Engineer Intern will join the Wearables Compute Group to support the development of the fifth-generation Spectacles. This role focuses on verifying a custom-developed System on Chip (SoC) to ensure high product quality for standalone, see-through AR glasses. The intern will research and implement state-of-the-art verification practices, including AI-driven tests, regression automation, and KPI exploration. Key responsibilities include partnering with mentors on technical projects and acquiring new verification engineering skills. Candidates should possess computer science or electrical engineering fundamentals tailored toward ASIC design. Preferred technical skills include UVM, SystemVerilog, Verilog, VHDL, C, and Python. Experience with AI-assisted coding tools like Claude or Cursor, along with familiarity with EDA vendor tools from Synopsys, Cadence, or Mentor, is also highly valued for this position.

What you'll do

  • Verify custom-developed System on Chip (SoC) designs to ensure high product quality.
  • Execute challenging technical projects that align with specific business and product needs.
  • Research and implement state-of-the-art verification practices like AI-driven tests.
  • Develop and manage regression automation for hardware verification.
  • Explore and analyze Key Performance Indicators (KPIs) for verification processes.
  • Apply new verification engineering skills to real-world hardware projects.

What we're looking for

  • Currently enrolled in a BS/MS program in a technical field such as computer science or electrical engineering.
  • Graduation date must be no earlier than December 2026.
  • Must be able to start in-office in Eindhoven for a 13-week internship in Q2 of 2026.
  • Strong computer science or electrical engineering fundamentals tailored towards ASIC design and verification.
  • Strong problem-solving skills and the ability to collaborate with international and cross-functional teams.
  • Background in verification methodologies and processes such as UVM or SystemVerilog (preferred).
  • Proficiency in SoC and scripting languages such as C or Python (preferred).
  • Ability to read and understand RTL code including SystemVerilog, Verilog, or VHDL (preferred).

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