SoC Product Architect, Memory Ecosystem

Nvidia

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Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$320,000–$488,750 / yr
Employment
Full-time
Posted
38 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $224k
This role $404k
$138k $526k
below market most similar roles pay here above market

This role pays more than 99% of similar roles. Most pay $194,058–$254,750 — the blue band above. At the midpoint, this role pays about $404k versus about $224k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1472 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1109 roles with salary data.

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At a glance

TL;DR · SoC Product Architect, Memory Ecosystem

Role Posting Log in to save

As a Senior SoC Product Architect, Memory Ecosystem, you will join the SoC Product Architecture team to drive the external memory ecosystem across DRAM and non-volatile flash. You will partner with major memory vendors to align technology roadmaps for DDR, LPDDR, GDDR, HBM, and NAND flash with internal SoC and platform requirements. Your daily responsibilities include articulating performance, power, and reliability needs, innovating new DRAM solutions, and co-optimizing memory subsystem architectures like channel topologies and error-management strategies. You will utilize skills in signal integrity, power delivery, and competitive analysis to influence product definitions. By collaborating with SoC architects, memory controller designers, and sourcing teams, you will solve complex technical problems regarding bandwidth, latency, and cost for AI, graphics, and accelerated computing products.

Skills

DRAM LPDDR GDDR HBM NAND Flash Memory Controller Design Signal Integrity Advanced Packaging CoWoS power‑management Benchmarking Product Roadmap PCB Design

What you'll do

  • Partner with major memory vendors to align their technology roadmaps with NVIDIA’s SoC and platform requirements.
  • Translate SoC performance, power, and capacity needs into clear, data-driven feedback and requests for memory vendors.
  • Innovate new DRAM solutions by exploring novel architectures, signaling, packaging, and power-management techniques.
  • Co-optimize SoC and memory subsystem architectures, including channel topologies, speed grades, and error-management strategies.
  • Represent NVIDIA at vendor technical reviews to present roadmap needs and drive technical decisions.
  • Integrate supply, cost, and reliability considerations into memory technology choices and long-term ecosystem strategy.
  • Perform competitive analysis by interpreting teardown data and benchmarking memory bandwidth and latency.

What we're looking for

  • MS in Electrical Engineering, Computer Engineering, Physics, or related field, or equivalent experience.
  • 18+ years of experience in DRAM / memory subsystem architecture, SoC or memory controller design, or related semiconductor roles.
  • Deep understanding of modern DRAM (DDR, LPDDR, GDDR, HBM) and non-volatile memories (NAND flash, managed NAND/SSD).
  • Proven experience working directly with memory vendors on product definition, bring-up, or co-development.
  • Solid background in SoC and system memory subsystems, including memory controllers, PHYs, signal integrity, and power delivery.
  • Demonstrated ability to perform competitive analysis, including interpreting teardown data and benchmarking memory bandwidth/latency.
  • Strong communication and presentation skills to represent technical positions in vendor meetings and multi-functional internal reviews.
  • Direct experience defining or architecting HBM, GDDR, or high-speed LPDDR solutions for GPUs or AI accelerators (preferred).

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