SoC Power Spec Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$175,000–$308,500 / yr
Posted
15 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $209k
This role $242k
$131k most similar roles pay here $327k

This role pays more than 78% of similar roles. Most pay $177,237–$241,750 — the shaded band above. At the midpoint, this role pays about $242k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · SoC Power Spec Engineer

As part of the Silicon Engineering group, the SoC Power Spec Engineer will model power dissipation at the SOC level for various components including Neural Engines, CPUs, Graphics, compute accelerators, media IPs, caches, and fabric. This role involves modeling power dissipation for specific customer use-cases and collaborating with architecture, design, and system teams to define power targets and delivery. The engineer will partner with lab and silicon characterization teams to correlate models with actual silicon data. Key technical requirements include deep knowledge of SOC architecture, building blocks like memory and media IPs, VLSI design flow, CMOS technology, and thermal control loops. Candidates should possess skills in scripting and data analysis while demonstrating a strong understanding of power modeling for mobile SoC designs to optimize leading-edge chips for improved power efficiency across various integrated systems.

What you'll do

  • Model power dissipation at the SoC level for CPUs, GPUs, Neural Engines, and memory systems.
  • Model power dissipation specifically for various customer use-cases and AI/ML workloads.
  • Define power targets and power delivery requirements at the SoC level with system designers.
  • Correlate power models to actual silicon data in partnership with lab and test teams.
  • Analyze and model thermal control loops and throttling mechanisms for chip performance.
  • Perform scripting and data analysis to optimize power efficiency across various IP blocks.

What we're looking for

  • A bachelor's degree in a relevant field and at least 10 years of relevant industry experience.
  • Master of Science in Electrical Engineering (preferred).
  • Deep knowledge of SoC architecture and power modeling (preferred).
  • Deep understanding of SoC building blocks including CPU, GPU, caches, memory, and media IPs (preferred).
  • Skills in scripting and data analysis (preferred).
  • Understanding of VLSI design flow, CMOS technology, and a background in Electrical Engineering (preferred).
  • Ability to understand and model thermal control loops and throttling mechanisms (preferred).
  • Strong teammate with excellent communication skills (preferred).

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