SoC Physical Design Engineer, PnR

Apple Inc

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Quick summary

Work type: On-site
Location: Austin, TX
Posted: 54 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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How this pay compares to similar roles

Similar $202k

$137k most similar roles pay here $273k

This listing doesn't post a salary. Most similar roles pay $172,375–$231,300.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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TL;DR · SoC Physical Design Engineer, PnR

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As an SoC Physical Design Engineer, PnR, you will be responsible for the physical implementation of design partitions from netlist to tapeout for highly complex SOCs utilizing innovative process technology. Working within a collaborative environment alongside architecture, CAD, timing, and logic design teams, you will drive physical aspects early in the design cycle to ensure successful delivery. Your daily responsibilities include completing netlist to GDS2 implementation, performing timing, physical, and electrical verification, and driving signoff closure for specific partitions while resolving flow issues. The role requires expertise in floor-planning, place and route, power grid design, STA, and EMIR using tools like Redhawk, Totem, or Voltus. Preferred technical skills include proficiency in Verilog, VHDL, Python, Perl, TCL, and SPICE, alongside a foundational understanding of logic gates and chip architecture.

Skills

PnR Physical Synthesis Floor-planning STA DRC LVS EMIR Redhawk Totem Voltus Verilog VHDL Python Perl TCL SPICE VLSI Logic Design

What you'll do

Execute the physical implementation of design partitions from netlist to tapeout.
Perform floorplanning, placement, and routing for complex SoC designs using advanced process technologies.
Drive timing, physical, and electrical verification to achieve signoff closure.
Manage power grid design and perform EMIR analysis using tools like Redhawk or Voltus.
Conduct physical design verification including DRC and LVS checks.
Identify and resolve issues related to physical design flows and implementation.
Coordinate with logic design teams to integrate physical requirements early in the design cycle.

What we're looking for

Minimum BS Degree with 0+ years experience.
Basic understanding of logic gates.
Relevant coursework or project work in computer architecture, VLSI, design, logic design, or circuit design (preferred).
Strong teamwork skills to collaborate with multiple functional teams across various fields (preferred).
Experience with Verilog, VHDL, Python, Perl, TCL and/or SPICE (preferred).