SoC Performance Architect

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TXHillsboro, OR
Salary
$142,200–$213,200 / yr
Posted
52 days ago
Freshness
Confirmed live yesterday
Closes
Jan 17, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $216k
This role $178k
$127k most similar roles pay here $286k

This role pays less than 79% of similar roles. Most pay $182,987–$250,000 — the shaded band above. At the midpoint, this role pays about $178k versus about $216k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · SoC Performance Architect

SoC Performance Architect (Server CPU) joins the SoC Architecture team to lead server workload analysis, performance modeling, and optimization across hardware and software stacks. The role involves identifying bottlenecks in CPU cores, cache hierarchies, memory subsystems, on-chip fabrics, and I/O while driving improvements in firmware, OS, and compiler behavior. You will build analytical and empirical models, conduct sensitivity studies, and provide performance projections for internal and competitive products. Key responsibilities include defining KPI frameworks, utilizing profiling and PMU tools to capture microarchitectural stall data, and performing CPI breakdowns. Required skills include deep knowledge of CPU microarchitecture, SoC architecture, and Linux environments. You will use scripting and data analysis to manage large datasets while collaborating across teams to provide data-driven recommendations for improving product performance and efficiency within the server domain.

What you'll do

  • Define performance methodologies, metrics, and KPI frameworks for consistent workload tracking and feature evaluation.
  • Conduct hardware and software sensitivity studies to quantify the impact of architectural parameters.
  • Perform bottleneck analysis across CPU cores, cache hierarchy, memory subsystems, on-chip fabric, and I/O.
  • Use profiling and PMU tools to capture hotspots, call stacks, CPI breakdowns, and microarchitectural stall data.
  • Build analytical and empirical models for workload behavior, scaling, and feature sensitivity.
  • Develop performance projections for internal roadmap products and external competitive products.
  • Identify and prioritize optimization opportunities across hardware, software, firmware, and compiler teams.
  • Communicate technical findings, trade-offs, and product implications to stakeholders.

What we're looking for

  • A PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field is required.
  • A Master's degree and 1+ year of systems engineering experience is accepted as an alternative to a PhD.
  • A Bachelor's degree and 2+ years of systems engineering experience is accepted as an alternative to higher degrees.
  • Candidates must have at least 2 years of experience in system architecture technology areas such as power, thermal management, or shared resources.
  • Deep knowledge of CPU microarchitecture including pipelines, out-of-order execution, branch prediction, and cache hierarchies is required.
  • Strong understanding of SoC architecture, memory controllers, DRAM systems, and I/O subsystems is required.
  • Proficiency in OS and compiler behavior, including scheduling, memory management, and code optimization, is required.
  • Experience with performance profiling tools, scripting for data analysis, and debugging server workloads in Linux environments is required.

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