below marketmost similar roles pay hereabove market
This role pays less than
87%
of similar roles. Most pay
$137,500–$200,000
— the blue band above.
At the midpoint, this role pays about
$125k
versus about
$169k
for comparable roles.
Based on 240 similar postings.
Employer
About SpaceX
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has
851 open roles
on FindRole.
Listed pay typically runs
$130,000–$165,000
across 590 roles with salary data.
Signal Integrity Engineer - Serdes, Satellites (Starlink)
Joining the Payload Engineering team, you will provide signal integrity ownership for the hardware portfolio enabling Starlink broadband connectivity. You will manage the entire product life-cycle, performing IP evaluation during silicon architecture, package performance evaluation, stack-up material selection, and PCB layout oversight. Your daily work involves specifying, simulating, verifying, and troubleshooting advanced satellite hardware, including wireline and electro-optical communication systems with 10 to 112+ Gbps SERDES, DSPs, and high-bandwidth memory interfaces like DDR4 and LPDDR5. You will utilize 3D EM simulation tools such as CST, HFSS, and ADS, alongside Python and C/C++. You will collaborate cross-functionally to architect novel channels and power delivery strategies, defining best practices for simulation workflows, test methodologies, and signoff criteria for satellite payloads.
Specify, design, simulate, and verify signal integrity for advanced satellite hardware and high-speed memory interfaces.
Perform package performance evaluation, stack-up material selection, and channel architecture analysis during early design cycles.
Oversee PCB layout and design transition structures from die bump to die bump.
Drive troubleshooting, characterization, and general debug for hardware across all product life-cycle phases.
Root cause and resolve issues found in PCB manufacturing, PCBA testing, or satellite integration.
Define best practices, simulation workflows, test methodologies, and signoff criteria for all signal integrity needs.
Derive top-level specifications for PCB materials and channel subcomponents.
What we're looking for
Bachelor’s degree in electrical engineering, computer engineering, or physics.
1+ years of industry experience designing circuits, electronic products, or hardware.
1+ years of experience using 3D EM simulation tools and high-speed digital channel simulators like CST, HFSS, or ADS.
1+ years of research or industry experience with high-speed digital design.
Master’s degree or PhD in electrical engineering or computer engineering with emphasis in electromagnetic theory, transmission line theory, or wireline transceivers (preferred).
3+ years of electronic product experience designing hardware from concept through production (preferred).
3+ years of experience architecting, implementing, and debugging cutting edge DSP based SERDES products (preferred).
3+ years of experience specifying, analyzing, debugging, and working with high speed, high bandwidth memory interfaces (preferred).
U.S. citizen, national, lawful permanent resident, refugee, asylee, or eligible for required Department of State authorizations.
Signal Integrity
SERDES
DDR4
LPDDR5
GPDDR6
QSPI NOR
eMMC
Python
C
C++
CST
HFSS
ADS
PCB Layout
EMI/EMC
DSP
Wireline Transceivers
High-Speed Digital Design
3D EM Simulation
PCB Layout
Schematic Capture
FPGA
Python
C/C++
Ethernet
DDR4
I2C
SPI
RF Engineering
Power Electronics
Hardware Bring-up
Digital to Analog Converters
High-Speed Digital Communications
SerDes
Space Lasers
Avionics
Python
SQL
C/C++
Electrical Engineering
Root Cause Analysis
PCBA
Oscilloscope
Multimeter
Spectrum Analyzer
Network Analyzer
Vector Signal Generator
Source Measurement Unit
Time Series Data Analysis
Reliability Statistics
HALT
HASS
Thermal Cycling
Shock Testing