Signal Integrity Engineer, Memory Interface

Apple Inc

Confirmed live yesterday Trusted

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Work type
On-site
Location
Austin, TX
Posted
143 days ago
Freshness
Confirmed live yesterday

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Similar $189k
$135k most similar roles pay here $228k

This listing doesn't post a salary. Most similar roles pay $161,965–$216,250.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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TL;DR · Signal Integrity Engineer, Memory Interface

As a Signal Integrity Engineer – Memory Interface, you will join the team developing SoCs used within mobile devices. You are responsible for memory interface signal integrity from package to board, focusing on the electrical and physical design of memory systems. Your daily work involves performing end-to-end signal and power integrity simulation studies, modeling channels and power delivery networks across die, interposer, package, PCB, and PMU components. You will provide design guidelines to cross-functional teams, conduct feasibility studies for next-generation signaling schemes, and perform correlation between simulations and silicon measurements. To succeed, you must apply transmission line theory and 2D/3D EM simulation tools while utilizing Python and generative AI coding assistants. You will also utilize lab equipment like VNA, TDR, real-time scopes, and spectrum analyzers to validate signal and power integrity for memory systems.

What you'll do

  • Perform end-to-end signal and power integrity simulation studies for memory systems across die, package, and PCB.
  • Model channels and power delivery networks to meet strict timing and voltage specifications.
  • Conduct electrical extraction and validation of package and motherboard designs.
  • Develop and execute test plans to validate signal and power integrity.
  • Correlate simulation results with actual silicon measurements.
  • Provide design guidelines and optimal IO settings to cross-functional teams.
  • Perform feasibility studies for next-generation signaling schemes.
  • Debug and improve product yield in coordination with product and system engineering teams.

What we're looking for

  • A bachelor's degree is the minimum requirement.
  • An MSEE with 5 years of industry experience or a Ph.D. is preferred.
  • Experience in signal and power integrity for memory interfaces is required.
  • Experience in package/board design, PI/SI methodology development, and lab correlation is preferred.
  • Proficiency with lab equipment such as VNA, TDR, real-time scopes, and spectrum analyzers is preferred.
  • Strong fundamentals in transmission line theory and 2D/3D EM simulation tools are required.
  • Proficiency in Python and experience using generative AI coding assistants to enhance productivity is required.

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