Signal Integrity Engineer – Memory Interface

Apple Inc

Quick summary

Work type: On-site
Location: Austin, TX
Posted: 45 days ago

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Salary context

How this pay compares to similar roles

Similar $187k

$132k most similar roles pay here $229k

This listing doesn't post a salary. Most similar roles pay $158,137–$216,250.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 638 open roles on FindRole.

Listed pay typically runs $171,600–$272,100 across 505 roles with salary data.

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At a glance

TL;DR · Signal Integrity Engineer – Memory Interface

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As a Signal Integrity Engineer for memory interfaces at Apple’s SOC development team, you will focus on the electrical and physical design of memory systems used in mobile devices. Your daily tasks include conducting comprehensive signal integrity and power integrity simulations across various components from die to PCB, collaborating with circuit and controller teams to optimize designs, and developing test plans to validate system performance. You will also provide critical feedback for silicon floorplans and package designs while ensuring optimal IO settings and guidelines are established. Essential skills include experience in memory interface SI/PI issues, lab equipment proficiency, and expertise in 3D/2D EM simulation tools alongside strong Python coding abilities enhanced by AI coding assistants. This role demands a deep understanding of transmission line theory and the ability to perform feasibility studies for future signaling schemes.

Skills

Python VNA TDR real-time_scope spectrum_analyzer 3D_EM_simulation_tools 2D_EM_simulation_tools transmission_line_theory SI PI generative_AI_coding_assistants

What you'll do

Conduct end-to-end signal integrity and power integrity simulations of memory systems.
Provide feedback and guidelines for silicon floorplan, package design, and system engineering.
Develop optimal IO settings and design guidelines for cross-functional teams.
Perform feasibility studies for new signaling schemes in memory interfaces.
Correlate simulation results with actual silicon measurements for validation.

What we're looking for

MSEE + 5 years of industry experience or Ph.D. in relevant field.
Extensive experience with signal and power integrity issues in memory interfaces.
Experience in product package/board design, PI/SI methodology development, and lab correlation/validation.
Strong fundamentals in 3D/2D EM simulation tools and transmission line theory.
Proficiency in Python and coding skills to leverage AI coding assistants.

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