Signal and Power Integrity Engineer, SIO Interface

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Francisco, CA
Salary
$129,300–$225,300 / yr
Posted
5 days ago
Freshness
Confirmed live yesterday

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Competitive pay

How this pay compares to similar roles

Similar $206k
This role $177k
$113k most similar roles pay here $277k

This role pays less than 62% of similar roles. Most pay $170,000–$241,750 — the shaded band above. At the midpoint, this role pays about $177k versus about $206k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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TL;DR · Signal and Power Integrity Engineer, SIO Interface

Signal and Power Integrity Engineer - SIO Interface will join the team developing SOCs used within Apple devices. This role focuses on high-speed serial interface signal integrity and power integrity from silicon through package to board. The engineer is responsible for electrical and physical design, including extraction and validation of packages and PCBs. Key responsibilities involve performing 3D model extractions and simulations for optimization across components like silicon analog front ends, interposers, substrates, connectors, and cables. The role requires defining interface specifications and collaborating with circuit design teams to improve product yield. Essential skills include transmission line theory, 2D/3D EM simulation tools, and experience with lab equipment such as VNA, TDR, real-time scopes, and spectrum analyzers. Candidates must possess expertise in USB or PCIe interfaces to solve complex signal and power integrity challenges for high-speed serdes systems.

What you'll do

  • Perform signal and power integrity analysis for high-speed serial interfaces from silicon to package to board.
  • Execute 3D model extractions and simulations for design optimization across all channel components.
  • Define, influence, and implement technical specifications for high-speed interface systems.
  • Drive co-design efforts across SOCs, packages, and systems to optimize product performance KPIs.
  • Develop and execute test plans to validate signal and power integrity results.
  • Collaborate with circuit design teams and vendors to optimize SI/PI modeling and characterization.
  • Work with product and system engineering teams to debug issues and improve product yield.

What we're looking for

  • Bachelor's degree is the minimum requirement.
  • Prior design and modeling experience with USB, PCIe, or comparable interfaces is required.
  • PhD in a relevant field (preferred).
  • BS and 5+ years or MS and 3+ years of relevant industry experience (preferred).
  • Familiarity with signal and power integrity issues of high speed serial interfaces (preferred).
  • Experience with package/board design, SI/PI methodology development, and lab correlation of simulation results (preferred).
  • Familiarity with lab equipment such as VNA, TDR, real-time scope, and spectrum analyzers (preferred).
  • Strong fundamentals in 3D/2D EM simulation tools and transmission line theory (preferred).

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