Senior Virtual Platform Functional Modeling Engineer

What you'll do

• Define and implement inter-node communication behaviors including message ordering, flow control, and protocol state machines.
• Design and improve simulation orchestration services for job scheduling, synchronization, logging, and deterministic execution.
• Develop model interfaces, adapters, and communication frameworks to enable scalable system integration.
• Create validation strategies, regression suites, debug infrastructure, and CI/CD automation to ensure model reliability.
• Translate architecture specifications into executable models and validation-ready platform behaviors.
• Evaluate commercial, open-source, and internal technologies to improve modeling productivity and platform scalability.
• Maintain technical documentation and provide training on virtual platform capabilities and methodologies.

What we're looking for

• Strong analytical and debugging skills with a passion for computer architecture and system design.
• Ability to drive technical initiatives from concept through implementation in a collaborative environment.
• Experience in functional modeling, virtual platform development, simulation frameworks, firmware enablement, or pre-silicon modeling environments (preferred).
• Strong C++ software development skills within modeling, systems software, firmware infrastructure, or platform-level environments (preferred).
• Experience developing, integrating, or validating functional models, device models, virtual platforms, or modeling APIs (preferred).
• Knowledge of SoC and platform architecture, including memory hierarchies, coherency mechanisms, and high-speed interconnects (preferred).
• Exposure to virtual platform technologies such as SystemC/TLM-2.0, Arm Fast Models, Simics, QEMU, or similar frameworks (preferred).
• Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field (preferred).
• Master's degree (preferred).