Senior Verification Engineer

Microsoft

Quick summary

Work type: On-site
Location: —
Salary: $119,800–$234,700 / yr
Posted: 32 days ago
Closes: Nov 22, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $182k

This role $177k

$106k most similar roles pay here $248k

This role pays more than 64% of similar roles. Most pay $163,165–$200,000 — the shaded band above. At the midpoint, this role pays about $177k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Microsoft

Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing

Microsoft currently has 622 open roles on FindRole.

Listed pay typically runs $119,800–$234,700 across 559 roles with salary data.

Most-posted roles

View all roles at Microsoft

At a glance

TL;DR · Senior Verification Engineer

Role Posting Log in to save

Join our Compute Silicon and Manufacturing Engineering (CSME) team as a Senior Verification Engineer, where you will play a pivotal role in defining and delivering operational measures for hardware manufacturing. Your day-to-day responsibilities include collaborating with architects and design engineers to create comprehensive test plans and verification strategies, writing and debugging constrained random stimulus, scoreboards, and checkers using System Verilog and UVM, and driving functional coverage closure. You will also mentor team members and collaborate across verification teams to ensure vertical and horizontal reuse of components. Ideal candidates have 3+ years of experience in SoC design and verification with a strong background in UVM and formal verification, along with expertise in ARM architecture and AMBA protocols. Experience with PCIe/CXL IPs, I/O virtualization, and AI-based tools is preferred. This role demands proficiency in System Verilog, C++, and Python, as well as excellent communication skills to thrive in a complex and dynamic environment focused on optimizing cloud infrastructure at scale.

Skills

SystemVerilog UVM C++ PCIe CXL ARM AMBA Python CI/CD Kubernetes Docker AWS Azure Git Jenkins Prometheus Grafana Terraform Ansible PostgreSQL MSSQL

What you'll do

Develop test plans covering verification strategy, requirements, and environments for SS- or SOC-level verification.
Write and debug constrained random stimulus, scoreboards, checkers, and assertions to verify design correctness.
Create UVM components to interface between test code and verification simulation environments.
Define and implement functional coverage metrics to drive coverage closure in verification processes.
Mentor team members and collaborate with verification teams on component reuse.

What we're looking for

3+ years of experience in SoC design and verification using System Verilog.
3+ years developing and utilizing UVM or formal verification environments.
Proven track record delivering complex SOC, SS, or IP testbenches.
Experience creating simulation environments and debugging for multiple silicon IPs/systems.
Knowledge of full chip and system level flows and protocols.
Comfort with AI-based tools to enhance productivity in design verification.

Similar roles

Senior SoC Verification Engineer

Microsoft

69 days ago $119,800–$234,700

C C++ Python UVM SystemVerilog VHDL Perl Ruby Linux Git CI/CD Docker AWS Kubernetes Jenkins GitHub Subversion Mercurial Bitbucket Confluence JIRA

Save

Principal Silicon Design Verification Engineer

Microsoft

1 day ago $142,800–$274,800

UVM C Verilog SystemVerilog Python Docker CI/CD Kubernetes AWS Azure PostgreSQL Git Jenkins Prometheus Grafana

Save

Senior System Verification Engineer

Nvidia

Santa Clara, CA 170 days ago $168,000–$264,500

C C++ SystemVerilog Verilog VHDL Perl Python UVM PCIe CXL NVLink IB Ethernet I2C I3C SPI UART Zebu_emulation

Save

Senior Verification and Validation Engineer

Nvidia

Austin, TX 136 days ago $136,000–$218,500

C C++ Python Perl VCS emulation FPGA debug tools CI/CD

Save