Senior System Software Engineer, RTL-to-GDS Flow Platform

Nvidia

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Work type
On-site
Location
Santa Clara, CA
Employment
Full-time
Posted
47 days ago
Freshness
Confirmed live today

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Similar $193k
$140k $252k
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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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TL;DR · Senior System Software Engineer, RTL-to-GDS Flow Platform

The Senior System Software Engineer, RTL-to-GDS Flow Platform joins the Engineering Workflow Platform team to build user-facing infrastructure for complex chip creation. You will design the control plane that transforms engineering intent and layered configurations into repeatable workflow stages, generated artifacts, and validation results. Daily tasks involve creating models for dependencies, workflow state, and provenance while diagnosing production failures involving Linux processes, shared filesystems, and schedulers. You will modernize established infrastructure while preserving behavior for active chip projects. Required skills include proficiency in Python, C++, Perl, shell scripting, Make, Tcl, YAML, and JSON. The role addresses the technical challenge of connecting EDA tools and distributed jobs to turn chip-design intent into reliable production workflows within the semiconductor design domain.

What does a System Software Engineer earn in California?

Median $235750 from 70 postings across 4 companies.

See salary data

What you'll do

  • Design the control plane to turn engineering intent and layered configurations into repeatable workflow stages.
  • Create models for dependencies, manifests, workflow state, retries, recovery, and provenance.
  • Diagnose and prevent production failures involving Linux processes, environment setups, and shared filesystems.
  • Modernize established Make, Tcl, Perl, Python, and shell infrastructure while preserving behavior for active projects.
  • Partner with chip-design teams and EDA experts to reproduce failures and deliver compatible migrations.
  • Improve workflow observability by creating structured logs, validation results, and actionable diagnostics.

What we're looking for

  • Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field, or equivalent experience.
  • At least 12 years of relevant software engineering experience.
  • Production ownership of workflow, build, release, developer-infrastructure, HPC, storage, or engineering-automation systems.
  • Strong Linux and POSIX fundamentals including files, permissions, processes, environment variables, and logs.
  • Practical programming experience in Python, C++, Perl, or a comparable language, plus shell scripting and familiarity with Make, YAML, and JSON.
  • Experience designing configuration or state models, debugging production failures, and migrating established systems without disrupting active users.
  • Semiconductor-design or EDA workflow experience across RTL, synthesis, place-and-route, timing, signoff, ECO, or design handoffs (preferred).
  • Experience with LSF, Slurm, Grid Engine, shared compute infrastructure, NFS, or other shared filesystems (preferred).

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