Principal SoC Architect, Robotics and Automotive

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$272,000–$431,250 / yr
Employment
Full-time
Posted
18 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $225k
This role $352k
$135k $463k
below market most similar roles pay here above market

This role pays more than 97% of similar roles. Most pay $193,935–$256,000 — the blue band above. At the midpoint, this role pays about $352k versus about $225k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Principal SoC Architect, Robotics and Automotive

The Principal SoC Architect joins the architecture team to drive the next generation of Edge AI, Robotics, and Autonomous Driving platforms. This role involves owning the architectural definition of SoCs that integrate GPUs, computer vision accelerators, and real-time processors into a single silicon fabric. Key responsibilities include end-to-end lifecycle ownership from concept to bring-up, performing PPA modeling for thermally constrained enclosures, and authoring high-quality architecture specifications. The position requires expertise in high-speed interfaces like PCIe, GMSL, and Time-Sensitive Networking, alongside knowledge of multimedia pipelines, cache coherency, virtualization, and hardware security. Candidates must understand hardware support for RTOS, deterministic latency, and mixed-criticality workloads. Technical skills include using SystemC, C++, and Python for architectural simulation to solve complex problems in spatial computing and sensor fusion.

What you'll do

  • Define and drive the hardware architecture from early concept through bring-up and ecosystem enablement.
  • Co-design hardware feature sets for low-latency robotics spatial computing, sensor fusion, and autonomous driving pipelines.
  • Perform rigorous performance, power, and area modeling for thermally constrained robotic enclosures and automotive ECUs.
  • Author high-quality architecture specifications and develop models to validate architectural choices.
  • Define validation plans to ensure hardware meets strict real-time execution and safety metrics.
  • Participate in silicon debug, performance tuning, and the generation of user documentation for customers.

What we're looking for

  • 15+ years of deep architecture design experience in high-performance silicon.
  • Master’s or PhD degree in Computer Engineering, Electrical Engineering, or equivalent experience.
  • Meaningful industry expertise in top-level SoC definition.
  • Practical knowledge of high-speed interfaces including PCIe, GMSL/Camera interfaces, and Time-Sensitive Networking/TSN.
  • Expertise in multimedia/vision accelerator pipelines, CPU/GPU cache coherency, Virtualization, and Hardware Security.
  • Deep understanding of hardware support for RTOS, deterministic latency, and mixed-criticality workloads.
  • Exceptional ability to communicate and solve technical hurdles across all abstraction levels from micro-architecture to software.
  • Experience in functional safety and mapping complex Edge AI workloads onto custom hardware (preferred); advanced programming in SystemC, C++, or Python (preferred).

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