Senior Mixed Signal Design Validation Engineer

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Posted
99 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k
This role $216k
$130k most similar roles pay here $279k

This role pays more than 81% of similar roles. Most pay $165,200–$216,250 — the shaded band above. At the midpoint, this role pays about $216k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Senior Mixed Signal Design Validation Engineer

As an experienced Mixed Signal Design Validation Engineer at NVIDIA, you will join our high-speed mixed signal circuits team to lead the bring-up and characterization of complex interfaces and modules, focusing on validating high-speed I/O systems for advanced memory technologies like LPDDR, GDDR, and HBM. Your daily tasks include creating validation test plans, conducting thorough characterizations under varying conditions, driving system-level validations, and developing scripts to optimize performance. You will collaborate closely with multi-functional teams such as Mixed Signal Design, PISI, hardware, firmware, and Memory Qualification Engineers to resolve issues and enhance memory interface designs. Essential skills include a BS degree in Electrical or Computer Engineering, extensive experience in silicon bring-up and debugging for high-speed memory interfaces, strong scripting abilities in Python or C, and proficiency with lab instrumentation and measurement theory.

What you'll do

  • Lead creation of validation test plans and scripts for LPDDR, GDDR, and HBM interfaces.
  • Conduct thorough characterization of mixed-signal circuit blocks under varying conditions.
  • Drive system-level validation to ensure high-speed memory interface performance meets standards.
  • Investigate and resolve issues in Memory I/O circuits to enhance future product design.
  • Develop and implement test scripts to optimize DDR I/O circuit performance and margins.
  • Mentor new engineers on validation practices, fostering a culture of excellence and improvement.

What we're looking for

  • 8+ years of experience in Electrical Engineering or related field
  • Expertise in silicon bring-up and debugging for high-speed memory interfaces
  • Deep understanding of mixed-signal circuits, analog, digital systems, and high-speed memory technologies
  • Proficiency with lab instrumentation including oscilloscopes and signal generators
  • Strong scripting skills in Python or C for test automation and data analysis
  • Experience working closely with multi-functional teams on complex projects
  • Proven ability to solve problems proactively and work in a fast-paced environment

More like this

Similar roles

Senior Circuit Design Engineer

Nvidia

Remote (Santa Clara, CA) 24 days ago $168,000$264,500
Spice Perl Tcl Make RTL Logic Synthesis Verification Place and Route Design-for-test(DFT) Analog Circuit Design Mixed-Signal Analog Block Design Digital Circuit Design Security Attacks Detection Circuits EM/IR Analysis Static Timing Analysis Noise Analysis Loop Stability Analysis Monte-Carlo Analysis
Remote

Senior Circuit Design Engineer

Nvidia

Santa Clara, CA 18 days ago $136,000$218,500
Perl Python Tcl Make SPICE Liberty models Deep Learning GPU Parallel Computing CI/CD

Mixed Signal Design / Systems Engineer

Qualcomm

Santa Clara, CA 51 days ago $198,600$297,800
Python Verilog VHDL MATLAB SPICE CADENCE CMOS TFT LTPS ASIC Sensor Physics HW/SW Co-optimization Firmware Development System Modeling Circuit Specifications Simulation Tools Algorithm Development Performance Optimization Layout Design Manufacturability Reliability