Senior Mixed-Signal Design Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
2 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k
This role $177k
$125k $236k
below market most similar roles pay here above market

This role pays less than 57% of similar roles. Most pay $165,000–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1668 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 657 roles with salary data.

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At a glance

TL;DR · Senior Mixed-Signal Design Engineer

The Senior Mixed-Signal Design Engineer will join the circuit verification team to verify the design and implementation of leading GPUs and SoCs. In this role, you will be responsible for the verification of Mixed Signal CMOS circuit design, architecture, and golden models using advanced verification methodologies. You will define verification scope, develop infrastructure, and verify design correctness while collaborating with multi-functional teams including circuit, logic, and test engineering. Required skills include experience in deep sub-micron process design for CMOS Analog and Mixed Signal circuits. You must be proficient with Cadence IC design environments, HSpice, Finesim, and XA tools. Proficiency in System Verilog or similar HVLs is required, with desirable experience in Perl and C/C++ programming for crafting test bench environments for component and top-level circuit verification.

What you'll do

  • Verify the design and implementation of Mixed Signal CMOS circuits and architectures.
  • Define the verification scope for high-speed SerDes platforms and GPU components.
  • Develop verification infrastructure and golden models using advanced verification methodologies.
  • Verify the correctness of sophisticated mixed-signal CMOS circuit designs.
  • Craft test bench environments for both component and top-level circuit verification.
  • Utilize System Verilog and other hardware verification languages to validate designs.
  • Perform debugging and analytical tasks to ensure design integrity.

What we're looking for

  • Bachelor's Degree in EE, CS, or CE (or equivalent experience).
  • 5+ years of proven experience in deep sub-micron process design.
  • Experience in CMOS Analog / Mixed Signal Circuit Design.
  • Skill in design and verification tools including Cadence's IC design environment, HSpice, Finesim, and XA.
  • Experience in crafting test bench environments for component and top level circuit verification.
  • Expertise in System Verilog or similar HVL.
  • Strong debugging and analytical skills.
  • Perl and C/C++ programming language experience (desirable).

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