Physical Synthesis CAD Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$184,700–$324,800 / yr
Posted
5 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k
This role $255k
$129k $346k
below market most similar roles pay here above market

This role pays more than 91% of similar roles. Most pay $177,250–$242,200 — the blue band above. At the midpoint, this role pays about $255k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3595 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2772 roles with salary data.

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At a glance

TL;DR · Physical Synthesis CAD Engineer

The Physical Synthesis CAD Engineer joins the hardware team to own synthesis challenges for Apple Silicon. This role involves developing, improving, and supporting the implementation flow from RTL through GDS signoff. The engineer will build innovative scripts, automation, and ML-based methodologies to improve physical synthesis techniques and achieve breakthrough PPA results for next-generation CPUs, GPUs, and NPUs. Key responsibilities include partnering with design teams to define optimal methodologies, validating techniques through PNR, STA, and power analysis, and influencing EDA vendor tool roadmaps. Required skills include experience with TCL, Python, or Perl scripting, along with industry-standard synthesis tools like Fusion Compiler or Genus. The role focuses on solving high-performance, low-power design problems to ensure faster and more efficient processor architectures.

What you'll do

  • Develop breakthrough physical synthesis techniques and validate them using full implementation flows including PNR and STA.
  • Apply advanced RTL optimization techniques to achieve significant improvements in performance, power, and area (PPA).
  • Create custom tools and ML-based methodologies to solve high-performance, low-power design problems.
  • Define optimal methodologies and flows for design teams to achieve superior PPA results.
  • Influence EDA vendor tool development by solving complex problems that exceed industry standards.
  • Deploy synthesis solutions and optimizations across multiple critical Apple Silicon projects.
  • Develop innovative scripts and automation to improve the implementation flow from RTL through GDS signoff.

What we're looking for

  • Bachelor of Science degree required.
  • Minimum of 10 years of relevant industry experience.
  • Experience with TCL, Python, or Perl scripting languages.
  • Experience with industry standard Synthesis tools such as Fusion Compiler or Genus.
  • Experience working with CAD tools and flows.
  • Demonstrated experience in implementation flows and methodologies including Synthesis, PNR, and STA sign-off (preferred).
  • Hands-on knowledge of industry standard Synthesis and PNR tools like Genus and Innovus (preferred).
  • Ability to analyze RTL structures and identify optimization opportunities (preferred).

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