Lead ASIC Modem Design Engineer

Amazon Inc

Quick summary

Work type: On-site
Location: Sunnyvale, CASan Diego, CA
Salary: $159,200–$215,300 / yr
Posted: 2 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $173k

This role $187k

$135k most similar roles pay here $224k

This role pays more than 74% of similar roles. Most pay $152,875–$192,500 — the shaded band above. At the midpoint, this role pays about $187k versus about $173k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 321 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 304 roles with salary data.

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At a glance

TL;DR · Lead ASIC Modem Design Engineer

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Join the high-performance ASIC design team at Amazon as a Lead Modem Engineer and contribute to the development of digital chip SOCs for satellite communications in Low Earth Orbit. In this senior role, you will define and implement wireless system architecture from specification to validation, focusing on optimizing customer experience while adhering to power and cost constraints. You will collaborate with verification teams using UVM, System C, and DPI-C for system-level verification, ensuring your block meets DFT, timing, and power targets. Key skills include digital logic design in DSP or communication systems, RTL implementation of DSP algorithms, and familiarity with UVM and MATLAB. This role requires a deep understanding of satellite operations and the ability to drive trade-off analysis for resource optimization.

Skills

SystemC UVM DPI-C RTL DSP Matlab Verilog VHDL Linux Python Git CI/CD FPGA ASIC PowerPC Xilinx Cadence Synopsys Tapeout

What you'll do

Implement wireless system architecture from specification to chip validation.
Optimize customer experience metrics while adhering to power and cost constraints.
Develop high-quality silicon solutions that meet first-time right design standards.
Create standalone verification test benches for block correctness verification.
Collaborate with the verification team on system-level verification using UVM, System C.
Ensure blocks meet DFT, timing, and power targets through close collaboration.

What we're looking for

7+ years of experience in digital logic design, preferably in DSP or communication systems.
Experience designing and implementing Digital Signal Processing (DSP) algorithms in RTL.
Ability to convert DSP algorithms into optimized RTL code for performance, power, and area.
Familiarity with UVM and MATLAB for verification purposes.
Expertise in creating standalone verification test benches using UVM, System C, and DPI-C.
Strong background in DFT, timing, and power target optimization.
Bachelor's degree in Electrical/Communications Engineering or equivalent experience.

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