Intern, Power-Thermal Simulation Software Engineer

Samsung Semiconductor

Confirmed live yesterday High trust
Hybrid

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Work type
Hybrid
Location
San Jose, CA
Employment
Intern
Posted
3 days ago
Freshness
Confirmed live yesterday

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Similar $198k
$139k $253k
below market most similar roles pay here above market

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About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 38 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 36 roles with salary data.

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TL;DR · Intern, Power-Thermal Simulation Software Engineer

Intern, Power-Thermal Simulation Software Engineer The Power & Thermal Lab is seeking a software engineering intern to contribute to the development of a simulator tool designed to help memory architecture and packaging teams visualize how designs impact power consumption and heat generation. You will support research and product teams by providing end-to-end simulation, regression testing, and data pipeline management. Your daily work involves building automation pipelines, implementing trace-driven power-thermal simulation engines, and developing high-fidelity power macromodels for AI memory component IPs. You will utilize C++, Python, Bash, and SystemC to extract power features and calibrate models against RTL or silicon data. This role addresses the critical bottleneck of physical memory in AI systems by providing rapid, accurate power and thermal analysis without requiring physical prototypes.

What you'll do

  • Build automation pipelines for simulation runs, regression testing, and result tracking.
  • Implement and optimize trace-driven power and thermal simulation engines.
  • Generate transient power maps and perform spatiotemporal hotspot analysis.
  • Develop high-fidelity power macromodels for AI memory component IPs using analytical modeling and neural networks.
  • Extract activity, value, and state-dependent power features from C, SystemC, and RTL simulations.
  • Calibrate models using synthesis-assisted anchors and validate against RTL, gate-level, and silicon data.
  • Integrate IP-level power macromodels into system-level simulations.
  • Manage time-indexed simulation flows across power and thermal domains.

What we're looking for

  • Pursuing a Master's or PhD in Computer Science, Electrical and Computer Engineering, or a related major.
  • Must have at least one academic quarter or semester remaining.
  • Proficiency in C++, Python or Bash scripting, and SystemC and/or transaction-level modeling.
  • Systems-level software engineering skills.
  • RTL design, synthesis, and analysis research and/or experience in Verilog, SystemVerilog, or SystemC (preferred).
  • Experience with large-scale simulation or EDA/CFD adjacent tooling environments (preferred).
  • Familiarity with discrete event or time-stepped simulation architecture (preferred).
  • Experience with GPU, computer architecture, AI memory, memory controllers, PHYs, or high-speed I/O (preferred).

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